140 lines
3.1 KiB
C
140 lines
3.1 KiB
C
/*
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* spi-uart debug routings
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* Copyright (C) 2008, Feng Tang <feng.tang@intel.com> Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include "spi-uart.h"
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#include "bootstub.h"
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#define MRST_SPI_TIMEOUT 0x200000
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static int spi_inited = 0;
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int no_uart_used = 0;
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static volatile struct mrst_spi_reg *pspi = 0;
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static void spi_init()
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{
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u32 ctrlr0;
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u32 *clk_reg, clk_cdiv;
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switch (*(int *)SPI_TYPE) {
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case SPI_1:
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if (mid_identify_cpu() == MID_CPU_CHIP_CLOVERVIEW)
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pspi = (struct mrst_spi_reg *)CTP_REGBASE_SPI1;
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else
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pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI1;
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break;
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case SPI_0:
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default:
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if (mid_identify_cpu() == MID_CPU_CHIP_CLOVERVIEW)
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pspi = (struct mrst_spi_reg *)CTP_REGBASE_SPI0;
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else
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pspi = (struct mrst_spi_reg *)MRST_REGBASE_SPI0;
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}
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/* disable SPI controller first */
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pspi->ssienr = 0x0;
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/* set control param, 16 bits, transmit only mode */
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ctrlr0 = pspi->ctrlr0;
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ctrlr0 &= 0xfcc0;
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ctrlr0 |= (0xf | (FRF_SPI << SPI_FRF_OFFSET)
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| (TMOD_TO << SPI_TMOD_OFFSET));
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pspi->ctrlr0 = ctrlr0;
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/* set a default baud rate, 115200 */
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/* get SPI controller operating freq info */
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clk_reg = (u32 *)MRST_CLK_SPI0_REG;
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clk_cdiv = ((*clk_reg) & CLK_SPI_CDIV_MASK) >> CLK_SPI_CDIV_OFFSET;
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pspi->baudr = MRST_SPI_CLK_BASE / (clk_cdiv + 1) / 115200;
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/* disable all INT for early phase */
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pspi->imr &= 0xffffff00;
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/* select one slave SPI device */
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pspi->ser = 0x2;
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/* enable the HW, this should be the last step for HW init */
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pspi->ssienr |= 0x1;
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spi_inited = 1;
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}
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/* set the ratio rate, INT */
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static void max3110_write_config(void)
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{
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u16 config;
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/* 115200, TM not set, no parity, 8bit word */
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config = 0xc001;
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pspi->dr[0] = config;
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}
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/* transfer char to a eligibal word and send to max3110 */
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static void max3110_write_data(char c)
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{
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u16 data;
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data = 0x8000 | c;
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pspi->dr[0] = data;
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}
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/* slave select should be called in the read/write function */
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static int spi_max3110_putc(char c)
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{
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unsigned int timeout;
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u32 sr;
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timeout = MRST_SPI_TIMEOUT;
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/* early putc need make sure the TX FIFO is not full*/
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while (timeout--) {
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sr = pspi->sr;
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if (!(sr & SR_TF_NOT_FULL))
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continue;
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else
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break;
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}
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if (timeout == 0xffffffff)
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return -1;
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max3110_write_data(c);
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return 0;
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}
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void bs_spi_printk(const char *str)
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{
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if ( no_uart_used )
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return;
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if (!spi_inited) {
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spi_init();
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max3110_write_config();
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}
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if (!str)
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return;
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while (*str) {
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if (*str == '\n')
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spi_max3110_putc('\r');
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spi_max3110_putc(*str++);
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}
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}
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