102 lines
2.3 KiB
C
102 lines
2.3 KiB
C
/* define spi-uart debug constrains */
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/* code for MRST early printk */
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#ifndef _SPI_UART
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#define _SPI_UART
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#include "types.h"
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#define MRST_REGBASE_SPI0 0xff128000
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#define MRST_REGBASE_SPI1 0xff128400
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#define MRST_REGBASE_SPI2 0xff128800
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#define CTP_REGBASE_SPI0 0xff128000
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#define CTP_REGBASE_SPI1 0xff135000
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#define CTP_REGBASE_SPI2 0xff136000
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/* HW info for MRST CLk Control Unit, one 32b reg */
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#define MRST_SPI_CLK_BASE 100000000 /* 100m */
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#define MRST_CLK_SPI0_REG 0xff11d86c
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#define CLK_SPI_BDIV_OFFSET 0
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#define CLK_SPI_BDIV_MASK 0x00000007
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#define CLK_SPI_CDIV_OFFSET 9
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#define CLK_SPI_CDIV_MASK 0x00000e00
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#define CLK_SPI_CDIV_100M 0x0
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#define CLK_SPI_CDIV_50M 0x1
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#define CLK_SPI_CDIV_33M 0x2
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#define CLK_SPI_CDIV_25M 0x3
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#define CLK_SPI_DISABLE_OFFSET 8
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struct mrst_spi_reg {
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vu32 ctrlr0; /* control reg 0 */
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vu32 ctrlr1; /* control reg 1 */
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vu32 ssienr; /* SSI enable reg */
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vu32 mwcr; /* Microwire control reg */
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vu32 ser; /* slave enable reg */
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vu32 baudr;
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vu32 txftlr;
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vu32 rxftlr;
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vu32 txflr;
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vu32 rxflr;
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vu32 sr;
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vu32 imr;
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vu32 isr;
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vu32 risr;
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vu32 txoicr;
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vu32 rxoicr;
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vu32 rxuicr;
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vu32 msticr;
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vu32 icr;
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vu32 dmacr;
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vu32 dmatdlr;
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vu32 dmardlr;
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vu32 idr;
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vu32 ssi_comp_version;
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vu32 dr[16]; /* 16 bits access for each 32bit space */
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};
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/* bit fields in CTRLR0 */
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#define SPI_DFS_OFFSET 0
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#define SPI_FRF_OFFSET 4
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#define FRF_SPI 0x0
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#define FRF_SSP 0x1
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#define FRF_MICROWIRE 0x2
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#define FRF_RESV 0x3
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#define SPI_SCPH_OFFSET 6
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#define SPI_SCOL_OFFSET 7
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#define SPI_TMOD_OFFSET 8
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#define TMOD_TR 0x0 /* xmit & recv */
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#define TMOD_TO 0x1 /* xmit only */
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#define TMOD_RO 0x2 /* recv only */
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#define TMOD_EPROMREAD 0x3 /* eeprom read mode */
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#define SPI_SLVOE_OFFSET 10
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#define SPI_SRL_OFFSET 11
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#define SPI_CFS_OFFSET 12
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/* bit fields in SR, 7 bits */
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#define SR_MASK 0x7f /* cover 7 bits */
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#define SR_BUSY (1 << 0)
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#define SR_TF_NOT_FULL (1 << 1)
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#define SR_TF_EMPT (1 << 2)
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#define SR_RF_NOT_EMPT (1 << 3)
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#define SR_RF_FULL (1 << 4)
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#define SR_TX_ERR (1 << 5)
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#define SR_DCOL (1 << 6)
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/* bit fields in ISR, IMR, RISR, 7 bits */
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#define SPI_INT_TXEI (1 << 0)
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#define SPI_INT_TXOI (1 << 1)
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#define SPI_INT_RXUI (1 << 2)
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#define SPI_INT_RXOI (1 << 3)
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#define SPI_INT_RXFI (1 << 4)
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#define SPI_INT_MSTI (1 << 5)
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extern void bs_spi_printk(const char *str);
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#endif
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