43 lines
5.9 KiB
INI
43 lines
5.9 KiB
INI
PHY_StandAlone = 00 # Boolean Indicates that there is no MAC cortex active; One of the major impacts is that PHY needs to perform TOP init phase that is done by MAC cortex in operational Mode; 0x0 with Mac; 0x1 no Mac
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PrimaryClockSettingTime = 05 # Time from rising CLK_REQ to valid P_clock from host millisecond (Default 5msec);
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ClockValidOnWakeUp = 00 # Indicate that when a host wakeup command is issued to the device a valid reference clock is already valid and stable; 0 - Reference clock is not valid (Default); 1 - Reference clock is already valid and stable
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SecondaryClockSettingTime = 05 # Time from rising CLK_REQ to valid S_clock from host(189x);
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Spare0 = 00
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AutoDetect = 00 # Bit 0: Auto detect valid; 0x0 - Disabled; 0x1 - Enabled;
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Dedicated_FEM = 00 # Bit 0: no FEM; Bit 2..3: vendor options (0: RFMD; 1: TQS; 2: SKWS);
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LowBand_component = 02 # 0x0: no switch; 0x1: 2way switch; 0x2: 3way switch; 0x3: Matching n/w; 0x4:double 3way switch (MRC)
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LowBand_component_type = 04 # Bit 0: One Hot; Bit 1: Control Enable; Bit 2: 1.8V; Bit 3: 3V;
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HighBand_component = 01 # 0x0: no switch; 0x1: 2way switch;
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HighBand_component_type = 09 # Bit 0: One Hot; Bit 1: Control Enable; Bit 2: 1.8V; Bit 3: 3V;
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NumberOfAssembledAnt2_4 = 01 # Indicates the active bands and the number of mounted antennas for 2.4GHz; 0x2
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NumberOfAssembledAnt5 = 01 # Indicates the active bands and the number of mounted antennas for 5GHz;
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External_PA_DC2DC = 00 # 0 - Internal_PA_DC2DC; 1 - External_PA_DC2DC;
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TCXO_LDO_Voltage = 00 # Tcxo LDO Voltage for 2.5 voltage select; 0x0: 2.5v; 0x1: 2.55v; 0x2: 2.6v; 0x3: 1.8v;
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XTALItrimVal = 04 # Current trimming for XTAL, Unsigned 0x4 (Default);
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IO_configuration = 01 # Configure DS according to the following table: 0x0 - 8mA; 0x1 - 4mA (default); 0x2 - 6mA; 0x3 - 2mA;
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SDIO_configuration = 00 # Bit 0: SDIO IB Enable sync; Bit 1: SDIO IB Enable async; Bit 2: SDIO IB Enable BlockMode;
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Settings = 00 # (Spare) General configuration;
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RxProfile = 00 # Boolean that determines the operation profile; 0x0: Normal; 0x1: High Sensitivity;
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PwrLimitReference11ABG = C8 # Single absolute output power value (dBm) that serves as the baseline for all perChanPwrLimitArrABG. Resolution 0..25 [dBm];
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PwrLimitReference11P = C8 # Single absolute output power value (dBm) that serves as the baseline for all perChanPwrLimitArr11P. Resolution 0..25 [dBm];
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Board_Type = 02 # EVB_18XX = 0; DVP_18XX = 1; HDK_18XX = 2; FPGA_18XX = 3; COM8_18XX = 4;
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EnableCLPC = 00 # Boolean that enables the Closed Loop Power Control FW mechanism. In external FEM solution (only 5 GHz), we will monitor and correct the output power based on power detector readings; 0x0 Disabled; 0x1 - Enabled;
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EnableTxLowPwrOnSiSoRdl = 00 # Enables the use of RF2 in a High Power SiSo RDL chip. This chain, sometimes referred to as the MiMo chain, can be utilized to transmit low power; 0x0 - Disabled; 0x1 - Enabled;
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Spare1 = 00 00 00 00 00 00 00 00 00
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Spare2 = 00 00 00 00 00 00 00 00 00
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PinMuxingPlatformOptions = 00 00 # Byte1 185x: Bit 0: NLE; Bit 1: FM LNA EN; Byte2 189x: Bit 0: NLE; Bit 1: GPS antenna select Bit 2: FM LNA EN; Bit 3: GPS PPS OUT; Bit 4: GPS external LNA EN;
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PerChanPwrLimitArr11P = 00 00 00 00 00 00 00 # This array gives the customer/user the ability to limit the TX output power at each of the 11P channels. There is only transmission category at 11P. Value is in delta from the pwrLimitReferenceP(dB) in 1(dB) resolution. 1 nibble per limit, 1 limit per channel, 14 channels: 7 bytes;
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SRState = 00 # 0 - Disabled, 1 - Enabled (Default);
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SRF1 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 # SRF1 - 1st parameter - num of rows;
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SRF2 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 # SRF2 - 2nd parameter - upper limit of the table;
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SRF3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 # SRF3 - All other parameters - Table values;
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PerChanPwrLimitArr11ABG = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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# Per_Chan_Pwr_Limit_Arr_11ABG This array gives the customer/user the ability to limit the TX output power at each of the 11ABG channels. Since we have multiple transmission types, that have different transmission mask, we have several limits per channel. 1 nibble per limit, 6 limits per channel for, 50 channels:150 bytes
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PsatMode = 00 # Byte 0 = Normal, 1 = Low;
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TxPower_level_MaxPower = 11 # Max power byte (Default 1E) dBm Hex val 0..30 index 0;
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TxPower_level_MedPower = 0A # Med power byte (Default 0A)- dBm Hex val 0..30 index 1;
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TxPower_level_LowPower = 00 # Low power byte (Default 00)- dBm Hex val 0..30 index 2;
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#--- Yaki, Below is our Additions - Guy & Michael.
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PerSubBandTxTraceLoss = 00 00 00 00 00 00 00 00 00 00 # Trance Loss value, 10 bytes (0 - BG1, 1 - BG2, 2..9 - A bands). Byte signed Value in 1/8[dB] resolution +/-16[dB]. This parameter is used in the TX calculations;
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PerSubBandRxTraceLoss = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 # Trance Loss value, 18 bytes (0 - BG1, 1 - BG2, 2..9 - RX1 A bands, 10..17 - RX2 A bands). Byte signed Value in 1/8[dB] resolution +/-16[dB]. This parameter is used in the RX calculations;
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TxRfMargin = 01 # Indicates the commited EVM/Mask margin in dB: 0,1,2,3 or 4. Default = 1;
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