218 lines
9.5 KiB
Makefile
218 lines
9.5 KiB
Makefile
###########################################################
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## Commands for running tblgen to compile a td file
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##########################################################
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define transform-td-to-out
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$(if $(LOCAL_IS_HOST_MODULE), \
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$(call transform-host-td-to-out,$(1)), \
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$(call transform-device-td-to-out,$(1)))
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endef
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###########################################################
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## TableGen: Compile .td files to .inc.
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###########################################################
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# Set LOCAL_MODULE_CLASS to STATIC_LIBRARIES default (require
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# for macro local-generated-sources-dir)
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ifeq ($(LOCAL_MODULE_CLASS),)
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LOCAL_MODULE_CLASS := STATIC_LIBRARIES
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endif
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ifneq ($(strip $(TBLGEN_TABLES)),)
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generated_sources := $(call local-generated-sources-dir)
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tblgen_gen_tables := $(addprefix $(generated_sources)/,$(TBLGEN_TABLES))
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LOCAL_GENERATED_SOURCES += $(tblgen_gen_tables)
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tblgen_source_dir := $(LOCAL_PATH)
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ifneq ($(TBLGEN_TD_DIR),)
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tblgen_source_dir := $(TBLGEN_TD_DIR)
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endif
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ifneq (,$(filter $(tblgen_source_dir),MCTargetDesc))
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tblgen_td_deps := $(tblgen_source_dir)/../*.td
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else
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tblgen_td_deps := $(tblgen_source_dir)/*.td
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endif
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tblgen_td_deps := $(wildcard $(tblgen_td_deps))
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#
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# The directory and the .td directory is not the same.
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#
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ifeq ($(tblgen_source_dir),$(LLVM_ROOT_PATH)/lib/Target/ARM/MCTargetDesc)
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$(generated_sources)/%GenRegisterInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenRegisterInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out, register-info)
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$(generated_sources)/%GenInstrInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenInstrInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,instr-info)
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$(generated_sources)/%GenSubtargetInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenSubtargetInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,subtarget)
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endif
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ifeq ($(tblgen_source_dir),$(LLVM_ROOT_PATH)/lib/Target/X86/MCTargetDesc)
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$(generated_sources)/%GenRegisterInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenRegisterInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out, register-info)
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$(generated_sources)/%GenInstrInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenInstrInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,instr-info)
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$(generated_sources)/%GenSubtargetInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenSubtargetInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,subtarget)
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endif
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ifeq ($(tblgen_source_dir),$(LLVM_ROOT_PATH)/lib/Target/Mips/MCTargetDesc)
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$(generated_sources)/%GenRegisterInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenRegisterInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out, register-info)
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$(generated_sources)/%GenInstrInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenInstrInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,instr-info)
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$(generated_sources)/%GenSubtargetInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenSubtargetInfo.inc: $(tblgen_source_dir)/../%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,subtarget)
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endif
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ifneq ($(filter %GenRegisterInfo.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenRegisterInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenRegisterInfo.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,register-info)
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endif
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ifneq ($(filter %GenInstrInfo.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenInstrInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenInstrInfo.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,instr-info)
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endif
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ifneq ($(filter %GenAsmWriter.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenAsmWriter.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenAsmWriter.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,asm-writer)
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endif
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ifneq ($(filter %GenAsmWriter1.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenAsmWriter1.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenAsmWriter1.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,asm-writer -asmwriternum=1)
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endif
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ifneq ($(filter %GenAsmMatcher.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenAsmMatcher.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenAsmMatcher.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,asm-matcher)
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endif
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# TODO(srhines): Is this needed
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ifneq ($(filter %GenCodeEmitter.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenCodeEmitter.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenCodeEmitter.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,emitter)
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endif
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ifneq ($(filter %GenMCCodeEmitter.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenMCCodeEmitter.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenMCCodeEmitter.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,emitter)
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endif
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ifneq ($(filter %GenMCPseudoLowering.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenMCPseudoLowering.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenMCPseudoLowering.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,pseudo-lowering)
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endif
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ifneq ($(filter %GenDAGISel.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenDAGISel.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenDAGISel.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,dag-isel)
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endif
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ifneq ($(filter %GenDisassemblerTables.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenDisassemblerTables.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenDisassemblerTables.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,disassembler)
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endif
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ifneq ($(filter %GenEDInfo.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenEDInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenEDInfo.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,enhanced-disassembly-info)
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endif
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ifneq ($(filter %GenFastISel.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenFastISel.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenFastISel.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,fast-isel)
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endif
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ifneq ($(filter %GenSubtargetInfo.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenSubtargetInfo.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenSubtargetInfo.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,subtarget)
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endif
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ifneq ($(filter %GenCallingConv.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenCallingConv.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenCallingConv.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,callingconv)
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endif
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ifneq ($(filter %GenIntrinsics.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/%GenIntrinsics.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/%GenIntrinsics.inc: $(tblgen_source_dir)/%.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,tgt_intrinsics)
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endif
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ifneq ($(findstring ARMGenDecoderTables.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/ARMGenDecoderTables.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/ARMGenDecoderTables.inc: $(tblgen_source_dir)/ARM.td \
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$(tblgen_td_deps) $(LLVM_TBLGEN)
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$(call transform-td-to-out,arm-decoder)
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endif
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ifneq ($(findstring Options.inc,$(tblgen_gen_tables)),)
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$(generated_sources)/Options.inc: TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
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$(generated_sources)/Options.inc: $(tblgen_source_dir)/Options.td \
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$(tblgen_td_deps) \
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$(LLVM_TBLGEN) \
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$(LLVM_ROOT_PATH)/include/llvm/Option/OptParser.td
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$(call transform-td-to-out,opt-parser-defs)
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endif
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# Reset local variables
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tblgen_td_deps :=
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endif
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