524 lines
21 KiB
C
524 lines
21 KiB
C
/*************************************************************************/ /*!
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@Title SGX KM API Header
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description Exported SGX API details
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#ifndef __SGXAPI_KM_H__
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#define __SGXAPI_KM_H__
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#if defined (__cplusplus)
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extern "C" {
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#endif
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#include "sgxdefs.h"
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#if (defined(__linux__) || defined(__QNXNTO__)) && !defined(USE_CODE)
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#if defined(__KERNEL__)
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#include <asm/unistd.h>
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#else
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#include <unistd.h>
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#endif
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#endif
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/******************************************************************************
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Some defines...
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******************************************************************************/
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/* SGX Heap IDs, note: not all heaps are available to clients */
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#define SGX_UNDEFINED_HEAP_ID (~0LU)
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#define SGX_GENERAL_HEAP_ID 0
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#define SGX_TADATA_HEAP_ID 1
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#define SGX_KERNEL_CODE_HEAP_ID 2
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#define SGX_KERNEL_DATA_HEAP_ID 3
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#define SGX_PIXELSHADER_HEAP_ID 4
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#define SGX_VERTEXSHADER_HEAP_ID 5
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#define SGX_PDSPIXEL_CODEDATA_HEAP_ID 6
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#define SGX_PDSVERTEX_CODEDATA_HEAP_ID 7
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#define SGX_SYNCINFO_HEAP_ID 8
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#define SGX_SHARED_3DPARAMETERS_HEAP_ID 9
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#define SGX_PERCONTEXT_3DPARAMETERS_HEAP_ID 10
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#if defined(SUPPORT_SGX_GENERAL_MAPPING_HEAP)
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#define SGX_GENERAL_MAPPING_HEAP_ID 11
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#endif
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#if defined(SGX_FEATURE_2D_HARDWARE)
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#define SGX_2D_HEAP_ID 12
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#endif
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#if defined(SUPPORT_MEMORY_TILING)
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#define SGX_VPB_TILED_HEAP_ID 14
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#endif
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#if defined(SUPPORT_ION)
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#define SGX_ION_HEAP_ID 15
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#endif
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#define SGX_MAX_HEAP_ID 16
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/*
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* Keep SGX_3DPARAMETERS_HEAP_ID as TQ full custom
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* shaders need it to select which heap to write
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* their ISP controll stream to.
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*/
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#if (defined(SUPPORT_PERCONTEXT_PB) || defined(SUPPORT_HYBRID_PB))
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#define SGX_3DPARAMETERS_HEAP_ID SGX_PERCONTEXT_3DPARAMETERS_HEAP_ID
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#else
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#define SGX_3DPARAMETERS_HEAP_ID SGX_SHARED_3DPARAMETERS_HEAP_ID
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#endif
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/* Define for number of bytes between consecutive code base registers */
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#if defined(SGX543) || defined(SGX544) || defined(SGX554)
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#define SGX_USE_CODE_SEGMENT_RANGE_BITS 23
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#else
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#define SGX_USE_CODE_SEGMENT_RANGE_BITS 19
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#endif
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#define SGX_MAX_TA_STATUS_VALS 32
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#define SGX_MAX_3D_STATUS_VALS 4
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#if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
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/* sync info structure array size */
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#define SGX_MAX_TA_DST_SYNCS 1
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#define SGX_MAX_TA_SRC_SYNCS 1
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#define SGX_MAX_3D_SRC_SYNCS 4
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/* note: there is implicitly 1 3D Dst Sync */
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#else
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/* sync info structure array size */
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#define SGX_MAX_SRC_SYNCS_TA 32
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#define SGX_MAX_DST_SYNCS_TA 1
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/* note: there is implicitly 1 3D Dst Sync */
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#define SGX_MAX_SRC_SYNCS_TQ 8
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#define SGX_MAX_DST_SYNCS_TQ 1
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#endif
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#if defined(SGX_FEATURE_EXTENDED_PERF_COUNTERS)
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#define PVRSRV_SGX_HWPERF_NUM_COUNTERS 8
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#define PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS 11
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#else
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#define PVRSRV_SGX_HWPERF_NUM_COUNTERS 9
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#define PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS 8
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#endif /* SGX543 */
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#define PVRSRV_SGX_HWPERF_INVALID 0x1
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#define PVRSRV_SGX_HWPERF_TRANSFER 0x2
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#define PVRSRV_SGX_HWPERF_TA 0x3
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#define PVRSRV_SGX_HWPERF_3D 0x4
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#define PVRSRV_SGX_HWPERF_2D 0x5
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#define PVRSRV_SGX_HWPERF_POWER 0x6
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#define PVRSRV_SGX_HWPERF_PERIODIC 0x7
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#define PVRSRV_SGX_HWPERF_3DSPM 0x8
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#define PVRSRV_SGX_HWPERF_MK_EVENT 0x101
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#define PVRSRV_SGX_HWPERF_MK_TA 0x102
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#define PVRSRV_SGX_HWPERF_MK_3D 0x103
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#define PVRSRV_SGX_HWPERF_MK_2D 0x104
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#define PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY 0x105
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#define PVRSRV_SGX_HWPERF_MK_TA_DUMMY 0x106
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#define PVRSRV_SGX_HWPERF_MK_3D_DUMMY 0x107
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#define PVRSRV_SGX_HWPERF_MK_2D_DUMMY 0x108
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#define PVRSRV_SGX_HWPERF_MK_TA_LOCKUP 0x109
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#define PVRSRV_SGX_HWPERF_MK_3D_LOCKUP 0x10A
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#define PVRSRV_SGX_HWPERF_MK_2D_LOCKUP 0x10B
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#define PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT 28
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#define PVRSRV_SGX_HWPERF_TYPE_OP_MASK ((1UL << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT) - 1)
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#define PVRSRV_SGX_HWPERF_TYPE_OP_START (0UL << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT)
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#define PVRSRV_SGX_HWPERF_TYPE_OP_END (1Ul << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT)
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#define PVRSRV_SGX_HWPERF_TYPE_TRANSFER_START (PVRSRV_SGX_HWPERF_TRANSFER | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_TRANSFER_END (PVRSRV_SGX_HWPERF_TRANSFER | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_TA_START (PVRSRV_SGX_HWPERF_TA | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_TA_END (PVRSRV_SGX_HWPERF_TA | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_3D_START (PVRSRV_SGX_HWPERF_3D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_3D_END (PVRSRV_SGX_HWPERF_3D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_2D_START (PVRSRV_SGX_HWPERF_2D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_2D_END (PVRSRV_SGX_HWPERF_2D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_POWER_START (PVRSRV_SGX_HWPERF_POWER | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_POWER_END (PVRSRV_SGX_HWPERF_POWER | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_PERIODIC (PVRSRV_SGX_HWPERF_PERIODIC)
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#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_START (PVRSRV_SGX_HWPERF_3DSPM | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_3DSPM_END (PVRSRV_SGX_HWPERF_3DSPM | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_TRANSFER_DUMMY_START (PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_TRANSFER_DUMMY_END (PVRSRV_SGX_HWPERF_MK_TRANSFER_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_DUMMY_START (PVRSRV_SGX_HWPERF_MK_TA_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_DUMMY_END (PVRSRV_SGX_HWPERF_MK_TA_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_DUMMY_START (PVRSRV_SGX_HWPERF_MK_3D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_DUMMY_END (PVRSRV_SGX_HWPERF_MK_3D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_DUMMY_START (PVRSRV_SGX_HWPERF_MK_2D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_DUMMY_END (PVRSRV_SGX_HWPERF_MK_2D_DUMMY | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_LOCKUP (PVRSRV_SGX_HWPERF_MK_TA_LOCKUP)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_LOCKUP (PVRSRV_SGX_HWPERF_MK_3D_LOCKUP)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_LOCKUP (PVRSRV_SGX_HWPERF_MK_2D_LOCKUP)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_START (PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_END (PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_START (PVRSRV_SGX_HWPERF_MK_TA | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_TA_END (PVRSRV_SGX_HWPERF_MK_TA | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_START (PVRSRV_SGX_HWPERF_MK_3D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_3D_END (PVRSRV_SGX_HWPERF_MK_3D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_START (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
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#define PVRSRV_SGX_HWPERF_TYPE_MK_2D_END (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
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#define PVRSRV_SGX_HWPERF_STATUS_OFF (0x0)
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#define PVRSRV_SGX_HWPERF_STATUS_RESET_COUNTERS (1UL << 0)
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#define PVRSRV_SGX_HWPERF_STATUS_GRAPHICS_ON (1UL << 1)
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#define PVRSRV_SGX_HWPERF_STATUS_PERIODIC_ON (1UL << 2)
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#define PVRSRV_SGX_HWPERF_STATUS_MK_EXECUTION_ON (1UL << 3)
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/*!
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*****************************************************************************
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* One entry in the HWPerf Circular Buffer.
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*****************************************************************************/
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typedef struct _PVRSRV_SGX_HWPERF_CB_ENTRY_
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{
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IMG_UINT32 ui32FrameNo;
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IMG_UINT32 ui32PID;
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IMG_UINT32 ui32RTData;
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IMG_UINT32 ui32Type;
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IMG_UINT32 ui32Ordinal;
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IMG_UINT32 ui32Info;
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IMG_UINT32 ui32Clocksx16;
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/* NOTE: There should always be at least as many 3D cores as TA cores. */
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IMG_UINT32 ui32Counters[SGX_FEATURE_MP_CORE_COUNT_3D][PVRSRV_SGX_HWPERF_NUM_COUNTERS];
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IMG_UINT32 ui32MiscCounters[SGX_FEATURE_MP_CORE_COUNT_3D][PVRSRV_SGX_HWPERF_NUM_MISC_COUNTERS];
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} PVRSRV_SGX_HWPERF_CB_ENTRY;
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/*
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Status values control structure
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*/
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typedef struct _CTL_STATUS_
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{
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IMG_DEV_VIRTADDR sStatusDevAddr;
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IMG_UINT32 ui32StatusValue;
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} CTL_STATUS;
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/*!
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List of possible requests/commands to SGXGetMiscInfo()
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*/
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typedef enum _SGX_MISC_INFO_REQUEST_
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{
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SGX_MISC_INFO_REQUEST_CLOCKSPEED = 0,
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SGX_MISC_INFO_REQUEST_SGXREV,
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SGX_MISC_INFO_REQUEST_DRIVER_SGXREV,
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#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
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SGX_MISC_INFO_REQUEST_MEMREAD,
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SGX_MISC_INFO_REQUEST_MEMCOPY,
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#endif /* SUPPORT_SGX_EDM_MEMORY_DEBUG */
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SGX_MISC_INFO_REQUEST_SET_HWPERF_STATUS,
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#if defined(SGX_FEATURE_DATA_BREAKPOINTS)
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SGX_MISC_INFO_REQUEST_SET_BREAKPOINT,
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SGX_MISC_INFO_REQUEST_POLL_BREAKPOINT,
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SGX_MISC_INFO_REQUEST_RESUME_BREAKPOINT,
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#endif /* SGX_FEATURE_DATA_BREAKPOINTS */
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SGX_MISC_INFO_DUMP_DEBUG_INFO,
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SGX_MISC_INFO_DUMP_DEBUG_INFO_FORCE_REGS,
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SGX_MISC_INFO_PANIC,
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SGX_MISC_INFO_REQUEST_SPM,
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SGX_MISC_INFO_REQUEST_ACTIVEPOWER,
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SGX_MISC_INFO_REQUEST_LOCKUPS,
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SGX_MISC_INFO_REQUEST_FORCE_I16 = 0x7fff
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} SGX_MISC_INFO_REQUEST;
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/******************************************************************************
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* Struct for passing SGX core rev/features from ukernel to driver.
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* This is accessed from the kernel part of the driver and microkernel; it is
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* only accessed in user space during buffer allocation in srvinit.
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******************************************************************************/
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typedef struct _PVRSRV_SGX_MISCINFO_FEATURES
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{
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IMG_UINT32 ui32CoreRev; /*!< SGX Core revision from HW register */
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IMG_UINT32 ui32CoreID; /*!< SGX Core ID from HW register */
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IMG_UINT32 ui32DDKVersion; /*!< software DDK version */
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IMG_UINT32 ui32DDKBuild; /*!< software DDK build no. */
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IMG_UINT32 ui32CoreIdSW; /*!< software core version (ID), e.g. SGX535, SGX540 */
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IMG_UINT32 ui32CoreRevSW; /*!< software core revision */
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IMG_UINT32 ui32BuildOptions; /*!< build options bit-field */
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#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
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IMG_UINT32 ui32DeviceMemValue; /*!< device mem value read from ukernel */
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#endif
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#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
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IMG_DEV_VIRTADDR sDevVAEDMStatusBuffer; /*!< DevVAddr of the EDM status buffer */
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IMG_PVOID pvEDMStatusBuffer; /*!< CPUVAddr of the EDM status buffer */
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#endif
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} PVRSRV_SGX_MISCINFO_FEATURES;
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/******************************************************************************
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* Struct for getting lock-up stats from the kernel driver
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******************************************************************************/
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typedef struct _PVRSRV_SGX_MISCINFO_LOCKUPS
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{
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IMG_UINT32 ui32HostDetectedLockups; /*!< Host timer detected lockups */
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IMG_UINT32 ui32uKernelDetectedLockups; /*!< Microkernel detected lockups */
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} PVRSRV_SGX_MISCINFO_LOCKUPS;
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/******************************************************************************
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* Struct for getting lock-up stats from the kernel driver
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******************************************************************************/
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typedef struct _PVRSRV_SGX_MISCINFO_ACTIVEPOWER
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{
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IMG_UINT32 ui32NumActivePowerEvents; /*!< active power events */
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} PVRSRV_SGX_MISCINFO_ACTIVEPOWER;
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/******************************************************************************
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* Struct for getting SPM stats fro the kernel driver
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******************************************************************************/
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typedef struct _PVRSRV_SGX_MISCINFO_SPM
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{
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IMG_HANDLE hRTDataSet; /*!< render target data set handle returned from SGXAddRenderTarget */
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IMG_UINT32 ui32NumOutOfMemSignals; /*!< Number of Out of Mem Signals */
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IMG_UINT32 ui32NumSPMRenders; /*!< Number of SPM renders */
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} PVRSRV_SGX_MISCINFO_SPM;
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#if defined(SGX_FEATURE_DATA_BREAKPOINTS)
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/*!
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******************************************************************************
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* Structure for SGX break points control
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*****************************************************************************/
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typedef struct _SGX_BREAKPOINT_INFO
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{
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/* set/clear BP boolean */
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IMG_BOOL bBPEnable;
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/* Index of BP to set */
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IMG_UINT32 ui32BPIndex;
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/* On which DataMaster(s) should the breakpoint fire? */
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IMG_UINT32 ui32DataMasterMask;
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/* DevVAddr of BP to set */
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IMG_DEV_VIRTADDR sBPDevVAddr, sBPDevVAddrEnd;
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/* Whether or not the desired breakpoint will be trapped */
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IMG_BOOL bTrapped;
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/* Will the requested breakpoint fire for reads? */
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IMG_BOOL bRead;
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/* Will the requested breakpoint fire for writes? */
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IMG_BOOL bWrite;
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/* Has a breakpoint been trapped? */
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IMG_BOOL bTrappedBP;
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/* Extra information recorded about a trapped breakpoint */
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IMG_UINT32 ui32CoreNum;
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IMG_DEV_VIRTADDR sTrappedBPDevVAddr;
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IMG_UINT32 ui32TrappedBPBurstLength;
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IMG_BOOL bTrappedBPRead;
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IMG_UINT32 ui32TrappedBPDataMaster;
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IMG_UINT32 ui32TrappedBPTag;
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} SGX_BREAKPOINT_INFO;
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#endif /* SGX_FEATURE_DATA_BREAKPOINTS */
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/*!
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******************************************************************************
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* Structure for setting the hardware performance status
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*****************************************************************************/
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typedef struct _PVRSRV_SGX_MISCINFO_SET_HWPERF_STATUS
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{
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/* See PVRSRV_SGX_HWPERF_STATUS_* */
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IMG_UINT32 ui32NewHWPerfStatus;
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#if defined(SGX_FEATURE_EXTENDED_PERF_COUNTERS)
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/* Specifies the HW's active group selectors */
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IMG_UINT32 aui32PerfGroup[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
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/* Specifies the HW's active bit selectors */
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IMG_UINT32 aui32PerfBit[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
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/* Specifies the HW's counter bit selectors */
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IMG_UINT32 ui32PerfCounterBitSelect;
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/* Specifies the HW's sum_mux selectors */
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IMG_UINT32 ui32PerfSumMux;
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#else
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/* Specifies the HW's active group */
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IMG_UINT32 ui32PerfGroup;
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#endif /* SGX_FEATURE_EXTENDED_PERF_COUNTERS */
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} PVRSRV_SGX_MISCINFO_SET_HWPERF_STATUS;
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/*!
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******************************************************************************
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* Structure for misc SGX commands in services
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*****************************************************************************/
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typedef struct _SGX_MISC_INFO_
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{
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SGX_MISC_INFO_REQUEST eRequest; /*!< Command request to SGXGetMiscInfo() */
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IMG_UINT32 ui32Padding;
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#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
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IMG_DEV_VIRTADDR sDevVAddrSrc; /*!< dev virtual addr for mem read */
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IMG_DEV_VIRTADDR sDevVAddrDest; /*!< dev virtual addr for mem write */
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IMG_HANDLE hDevMemContext; /*!< device memory context for mem debug */
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#endif
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union
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{
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IMG_UINT32 reserved; /*!< Unused: ensures valid code in the case everything else is compiled out */
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PVRSRV_SGX_MISCINFO_FEATURES sSGXFeatures;
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IMG_UINT32 ui32SGXClockSpeed;
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PVRSRV_SGX_MISCINFO_ACTIVEPOWER sActivePower;
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PVRSRV_SGX_MISCINFO_LOCKUPS sLockups;
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PVRSRV_SGX_MISCINFO_SPM sSPM;
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#if defined(SGX_FEATURE_DATA_BREAKPOINTS)
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|
SGX_BREAKPOINT_INFO sSGXBreakpointInfo;
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#endif
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PVRSRV_SGX_MISCINFO_SET_HWPERF_STATUS sSetHWPerfStatus;
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} uData;
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} SGX_MISC_INFO;
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#if defined(SGX_FEATURE_2D_HARDWARE)
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|
/*
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* The largest number of source sync objects that can be associated with a blit
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|
* command. Allows for src, pattern, and mask
|
|
*/
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|
#define PVRSRV_MAX_BLT_SRC_SYNCS 3
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#endif
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#define SGX_KICKTA_DUMPBITMAP_MAX_NAME_LENGTH 256
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|
|
|
/*
|
|
Structure for dumping bitmaps
|
|
*/
|
|
typedef struct _SGX_KICKTA_DUMPBITMAP_
|
|
{
|
|
IMG_DEV_VIRTADDR sDevBaseAddr;
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|
IMG_UINT32 ui32Flags;
|
|
IMG_UINT32 ui32Width;
|
|
IMG_UINT32 ui32Height;
|
|
IMG_UINT32 ui32Stride;
|
|
IMG_UINT32 ui32PDUMPFormat;
|
|
IMG_UINT32 ui32BytesPP;
|
|
IMG_CHAR pszName[SGX_KICKTA_DUMPBITMAP_MAX_NAME_LENGTH];
|
|
} SGX_KICKTA_DUMPBITMAP, *PSGX_KICKTA_DUMPBITMAP;
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|
|
|
#define PVRSRV_SGX_PDUMP_CONTEXT_MAX_BITMAP_ARRAY_SIZE (16)
|
|
|
|
/*!
|
|
******************************************************************************
|
|
* Data required only when dumping parameters
|
|
*****************************************************************************/
|
|
typedef struct _PVRSRV_SGX_PDUMP_CONTEXT_
|
|
{
|
|
/* cache control word for micro kernel cache flush/invalidates */
|
|
IMG_UINT32 ui32CacheControl;
|
|
|
|
} PVRSRV_SGX_PDUMP_CONTEXT;
|
|
|
|
|
|
#if !defined (SUPPORT_SID_INTERFACE)
|
|
typedef struct _SGX_KICKTA_DUMP_ROFF_
|
|
{
|
|
IMG_HANDLE hKernelMemInfo; /*< Buffer handle */
|
|
IMG_UINT32 uiAllocIndex; /*< Alloc index for LDDM */
|
|
IMG_UINT32 ui32Offset; /*< Byte offset to value to dump */
|
|
IMG_UINT32 ui32Value; /*< Actual value to dump */
|
|
IMG_PCHAR pszName; /*< Name of buffer */
|
|
} SGX_KICKTA_DUMP_ROFF, *PSGX_KICKTA_DUMP_ROFF;
|
|
#endif
|
|
|
|
#if defined (SUPPORT_SID_INTERFACE)
|
|
typedef struct _SGX_KICKTA_DUMP_BUFFER_KM_
|
|
#else
|
|
typedef struct _SGX_KICKTA_DUMP_BUFFER_
|
|
#endif
|
|
{
|
|
IMG_UINT32 ui32SpaceUsed;
|
|
IMG_UINT32 ui32Start; /*< Byte offset of start to dump */
|
|
IMG_UINT32 ui32End; /*< Byte offset of end of dump (non-inclusive) */
|
|
IMG_UINT32 ui32BufferSize; /*< Size of buffer */
|
|
IMG_UINT32 ui32BackEndLength; /*< Size of back end portion, if End < Start */
|
|
IMG_UINT32 uiAllocIndex;
|
|
IMG_HANDLE hKernelMemInfo; /*< MemInfo handle for the circular buffer */
|
|
IMG_PVOID pvLinAddr;
|
|
#if defined(SUPPORT_SGX_NEW_STATUS_VALS)
|
|
IMG_HANDLE hCtrlKernelMemInfo; /*< MemInfo handle for the control structure of the
|
|
circular buffer */
|
|
IMG_DEV_VIRTADDR sCtrlDevVAddr; /*< Device virtual address of the memory in the
|
|
control structure to be checked */
|
|
#endif
|
|
IMG_PCHAR pszName; /*< Name of buffer */
|
|
|
|
#if defined (__QNXNTO__)
|
|
IMG_UINT32 ui32NameLength; /*< Number of characters in buffer name */
|
|
#endif
|
|
#if defined (SUPPORT_SID_INTERFACE)
|
|
} SGX_KICKTA_DUMP_BUFFER_KM, *PSGX_KICKTA_DUMP_BUFFER_KM;
|
|
#else
|
|
} SGX_KICKTA_DUMP_BUFFER, *PSGX_KICKTA_DUMP_BUFFER;
|
|
#endif
|
|
|
|
#if !defined (SUPPORT_SID_INTERFACE)
|
|
#ifdef PDUMP
|
|
/*
|
|
PDUMP version of above kick structure
|
|
*/
|
|
typedef struct _SGX_KICKTA_PDUMP_
|
|
{
|
|
// Bitmaps to dump
|
|
PSGX_KICKTA_DUMPBITMAP psPDumpBitmapArray;
|
|
IMG_UINT32 ui32PDumpBitmapSize;
|
|
|
|
// Misc buffers to dump (e.g. TA, PDS etc..)
|
|
PSGX_KICKTA_DUMP_BUFFER psBufferArray;
|
|
IMG_UINT32 ui32BufferArraySize;
|
|
|
|
// Roffs to dump
|
|
PSGX_KICKTA_DUMP_ROFF psROffArray;
|
|
IMG_UINT32 ui32ROffArraySize;
|
|
} SGX_KICKTA_PDUMP, *PSGX_KICKTA_PDUMP;
|
|
#endif /* PDUMP */
|
|
#endif /* #if !defined (SUPPORT_SID_INTERFACE) */
|
|
|
|
#if defined(TRANSFER_QUEUE)
|
|
#if defined(SGX_FEATURE_2D_HARDWARE)
|
|
/* Maximum size of ctrl stream for 2d blit command (in 32 bit words) */
|
|
#define SGX_MAX_2D_BLIT_CMD_SIZE 26
|
|
#define SGX_MAX_2D_SRC_SYNC_OPS 3
|
|
#endif
|
|
#define SGX_MAX_TRANSFER_STATUS_VALS 2
|
|
#define SGX_MAX_TRANSFER_SYNC_OPS 5
|
|
#endif
|
|
|
|
#if defined (__cplusplus)
|
|
}
|
|
#endif
|
|
|
|
#endif /* __SGXAPI_KM_H__ */
|
|
|
|
/******************************************************************************
|
|
End of file (sgxapi_km.h)
|
|
******************************************************************************/
|