147 lines
4.7 KiB
C
147 lines
4.7 KiB
C
/*
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* Copyright 2001-2008 Texas Instruments - http://www.ti.com/
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* ======== cfgdefs.h ========
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* DSP-BIOS Bridge driver support functions for TI OMAP processors.
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* Purpose:
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* Global CFG constants and types, shared between class and mini driver.
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*
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*! Revision History:
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*! ================
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*! 24-Feb-2003 kc Removed wIOPort* in CFG_HOSTRES.
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*! 06-Sep-2000 jeh Added channel info to CFG_HOSTRES.
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*! 09-May-2000 rr: CFG_HOSTRES now support multiple windows for PCI support.
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*! 31-Jan-2000 rr: Comments changed after code review.
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*! 06-Jan-2000 rr: Bus Type included in CFG_HOSTRES.
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*! 12-Nov-1999 rr: CFG_HOSTRES member names changed.
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*! 25-Oct-1999 rr: Modified the CFG_HOSTRES Structure
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*! PCMCIA ISR Register/Unregister fxn removed..
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*! New flag PCCARD introduced during compile time.
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*! 10-Sep-1999 ww: Added PCMCIA ISR Register/Unregister fxn.
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*! 01-Sep-1999 ag: Removed NT/95 specific fields in CFG_HOSTRES
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*! 27-Oct-1997 cr: Updated CFG_HOSTRES struct to support 1+ IRQs per board.
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*! 17-Sep-1997 gp: Tacked some NT config info to end of CFG_HOSTRES structure.
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*! 12-Dec-1996 cr: Cleaned up after code review.
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*! 14-Nov-1996 gp: Renamed from wsxcfg.h
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*! 19-Jun-1996 cr: Created.
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*/
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#ifndef CFGDEFS_
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#define CFGDEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Maximum length of module search path. */
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#define CFG_MAXSEARCHPATHLEN 255
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/* Maximum length of general paths. */
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#define CFG_MAXPATH 255
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/* Host Resources: */
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#define CFG_MAXMEMREGISTERS 9
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#define CFG_MAXIOPORTS 20
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#define CFG_MAXIRQS 7
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#define CFG_MAXDMACHANNELS 7
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/* IRQ flag */
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#define CFG_IRQSHARED 0x01 /* IRQ can be shared */
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/* DSP Resources: */
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#define CFG_DSPMAXMEMTYPES 10
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#define CFG_DEFAULT_NUM_WINDOWS 1 /* We support only one window. */
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/* A platform-related device handle: */
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/*typedef struct CFG_DEVNODE *CFG_HDEVNODE;*/
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struct CFG_DEVNODE;
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/*
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* Host resource structure.
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*/
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struct CFG_HOSTRES {
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DWORD wNumMemWindows; /* Set to default */
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/* This is the base.memory */
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DWORD dwMemBase[CFG_MAXMEMREGISTERS]; /* SHM virtual address */
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DWORD dwMemLength[CFG_MAXMEMREGISTERS]; /* Length of the Base */
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DWORD dwMemPhys[CFG_MAXMEMREGISTERS]; /* SHM Physical address */
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BYTE bIRQRegisters; /* IRQ Number */
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BYTE bIRQAttrib; /* IRQ Attribute */
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DWORD dwOffsetForMonitor; /* The Shared memory starts from
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* dwMemBase + this offset
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*/
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DWORD dwBusType; /* Bus type for this device */
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DWORD dwProgBase; /* DSP ProgBase */
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DWORD dwProgLength; /* DSP ProgBase Length */
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DWORD dwRegBase; /* DSP memory mapped register base */
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DWORD dwRegLength; /* DSP Register Base Length */
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DWORD ClientHandle; /* Client Handle */
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DWORD SocketHandle; /* Socket and Function Pair */
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DWORD CardInfo; /* This will be used as a context data in
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* in the CardRequestIRQ
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*/
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/*
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* Info needed by NODE for allocating channels to communicate with RMS:
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* dwChnlOffset: Offset of RMS channels. Lower channels are
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* reserved.
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* dwChnlBufSize: Size of channel buffer to send to RMS
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* dwNumChnls: Total number of channels (including reserved).
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*/
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DWORD dwChnlOffset;
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DWORD dwChnlBufSize;
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DWORD dwNumChnls;
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#ifdef OMAP_2430
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DWORD dwPrcmBase;
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DWORD dwWdTimerDspBase;
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DWORD dwMboxBase;
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DWORD dwDmmuBase;
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DWORD dwDipiBase;
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DWORD dwSysCtrlBase;
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#endif
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#ifdef OMAP_3430
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DWORD dwPrmBase;
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DWORD dwCmBase;
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DWORD dwPerBase;
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DWORD dwWdTimerDspBase;
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DWORD dwMboxBase;
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DWORD dwDmmuBase;
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DWORD dwDipiBase;
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DWORD dwSysCtrlBase;
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#endif
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} ;
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struct CFG_DSPMEMDESC {
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UINT uMemType; /* Type of memory. */
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ULONG ulMin; /* Minimum amount of memory of this type. */
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ULONG ulMax; /* Maximum amount of memory of this type. */
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} ;
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struct CFG_DSPRES {
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UINT uChipType; /* DSP chip type. */
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UINT uWordSize; /* Number of bytes in a word */
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UINT cChips; /* Number of chips. */
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UINT cMemTypes; /* Types of memory. */
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struct CFG_DSPMEMDESC aMemDesc[CFG_DSPMAXMEMTYPES];
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/* DSP Memory types */
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} ;
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#ifdef __cplusplus
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}
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#endif
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#endif /* CFGDEFS_ */
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