253 lines
8.4 KiB
C++
253 lines
8.4 KiB
C++
/*
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* Copyright (C) 2011 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "assembler.h"
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#include <algorithm>
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#include <vector>
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#ifdef ART_ENABLE_CODEGEN_arm
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#include "arm/assembler_arm32.h"
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#include "arm/assembler_thumb2.h"
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#endif
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#ifdef ART_ENABLE_CODEGEN_arm64
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#include "arm64/assembler_arm64.h"
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips
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#include "mips/assembler_mips.h"
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips64
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#include "mips64/assembler_mips64.h"
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86
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#include "x86/assembler_x86.h"
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86_64
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#include "x86_64/assembler_x86_64.h"
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#endif
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#include "base/casts.h"
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#include "globals.h"
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#include "memory_region.h"
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namespace art {
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AssemblerBuffer::AssemblerBuffer(ArenaAllocator* arena)
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: arena_(arena) {
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static const size_t kInitialBufferCapacity = 4 * KB;
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contents_ = arena_->AllocArray<uint8_t>(kInitialBufferCapacity, kArenaAllocAssembler);
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cursor_ = contents_;
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limit_ = ComputeLimit(contents_, kInitialBufferCapacity);
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fixup_ = nullptr;
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slow_path_ = nullptr;
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#ifndef NDEBUG
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has_ensured_capacity_ = false;
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fixups_processed_ = false;
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#endif
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// Verify internal state.
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CHECK_EQ(Capacity(), kInitialBufferCapacity);
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CHECK_EQ(Size(), 0U);
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}
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AssemblerBuffer::~AssemblerBuffer() {
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if (arena_->IsRunningOnMemoryTool()) {
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arena_->MakeInaccessible(contents_, Capacity());
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}
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}
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void AssemblerBuffer::ProcessFixups(const MemoryRegion& region) {
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AssemblerFixup* fixup = fixup_;
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while (fixup != nullptr) {
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fixup->Process(region, fixup->position());
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fixup = fixup->previous();
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}
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}
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void AssemblerBuffer::FinalizeInstructions(const MemoryRegion& instructions) {
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// Copy the instructions from the buffer.
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MemoryRegion from(reinterpret_cast<void*>(contents()), Size());
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instructions.CopyFrom(0, from);
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// Process fixups in the instructions.
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ProcessFixups(instructions);
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#ifndef NDEBUG
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fixups_processed_ = true;
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#endif
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}
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void AssemblerBuffer::ExtendCapacity(size_t min_capacity) {
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size_t old_size = Size();
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size_t old_capacity = Capacity();
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DCHECK_GT(min_capacity, old_capacity);
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size_t new_capacity = std::min(old_capacity * 2, old_capacity + 1 * MB);
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new_capacity = std::max(new_capacity, min_capacity);
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// Allocate the new data area and copy contents of the old one to it.
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contents_ = reinterpret_cast<uint8_t*>(
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arena_->Realloc(contents_, old_capacity, new_capacity, kArenaAllocAssembler));
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// Update the cursor and recompute the limit.
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cursor_ = contents_ + old_size;
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limit_ = ComputeLimit(contents_, new_capacity);
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// Verify internal state.
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CHECK_EQ(Capacity(), new_capacity);
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CHECK_EQ(Size(), old_size);
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}
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void DebugFrameOpCodeWriterForAssembler::ImplicitlyAdvancePC() {
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uint32_t pc = dchecked_integral_cast<uint32_t>(assembler_->CodeSize());
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if (delay_emitting_advance_pc_) {
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uint32_t stream_pos = dchecked_integral_cast<uint32_t>(opcodes_.size());
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delayed_advance_pcs_.push_back(DelayedAdvancePC {stream_pos, pc});
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} else {
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AdvancePC(pc);
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}
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}
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std::unique_ptr<Assembler> Assembler::Create(
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ArenaAllocator* arena,
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InstructionSet instruction_set,
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const InstructionSetFeatures* instruction_set_features) {
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switch (instruction_set) {
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#ifdef ART_ENABLE_CODEGEN_arm
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case kArm:
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return std::unique_ptr<Assembler>(new (arena) arm::Arm32Assembler(arena));
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case kThumb2:
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return std::unique_ptr<Assembler>(new (arena) arm::Thumb2Assembler(arena));
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#endif
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#ifdef ART_ENABLE_CODEGEN_arm64
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case kArm64:
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return std::unique_ptr<Assembler>(new (arena) arm64::Arm64Assembler(arena));
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips
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case kMips:
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return std::unique_ptr<Assembler>(new (arena) mips::MipsAssembler(
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arena,
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instruction_set_features != nullptr
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? instruction_set_features->AsMipsInstructionSetFeatures()
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: nullptr));
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#endif
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#ifdef ART_ENABLE_CODEGEN_mips64
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case kMips64:
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return std::unique_ptr<Assembler>(new (arena) mips64::Mips64Assembler(arena));
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86
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case kX86:
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return std::unique_ptr<Assembler>(new (arena) x86::X86Assembler(arena));
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#endif
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#ifdef ART_ENABLE_CODEGEN_x86_64
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case kX86_64:
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return std::unique_ptr<Assembler>(new (arena) x86_64::X86_64Assembler(arena));
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#endif
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default:
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LOG(FATAL) << "Unknown InstructionSet: " << instruction_set;
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return nullptr;
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}
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}
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void Assembler::StoreImmediateToThread32(ThreadOffset<4> dest ATTRIBUTE_UNUSED,
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uint32_t imm ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::StoreImmediateToThread64(ThreadOffset<8> dest ATTRIBUTE_UNUSED,
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uint32_t imm ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::StoreStackOffsetToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
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FrameOffset fr_offs ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::StoreStackOffsetToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
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FrameOffset fr_offs ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::StoreStackPointerToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::StoreStackPointerToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::LoadFromThread32(ManagedRegister dest ATTRIBUTE_UNUSED,
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ThreadOffset<4> src ATTRIBUTE_UNUSED,
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size_t size ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::LoadFromThread64(ManagedRegister dest ATTRIBUTE_UNUSED,
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ThreadOffset<8> src ATTRIBUTE_UNUSED,
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size_t size ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::LoadRawPtrFromThread32(ManagedRegister dest ATTRIBUTE_UNUSED,
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ThreadOffset<4> offs ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::LoadRawPtrFromThread64(ManagedRegister dest ATTRIBUTE_UNUSED,
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ThreadOffset<8> offs ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::CopyRawPtrFromThread32(FrameOffset fr_offs ATTRIBUTE_UNUSED,
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ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::CopyRawPtrFromThread64(FrameOffset fr_offs ATTRIBUTE_UNUSED,
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ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::CopyRawPtrToThread32(ThreadOffset<4> thr_offs ATTRIBUTE_UNUSED,
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FrameOffset fr_offs ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::CopyRawPtrToThread64(ThreadOffset<8> thr_offs ATTRIBUTE_UNUSED,
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FrameOffset fr_offs ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::CallFromThread32(ThreadOffset<4> offset ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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void Assembler::CallFromThread64(ThreadOffset<8> offset ATTRIBUTE_UNUSED,
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ManagedRegister scratch ATTRIBUTE_UNUSED) {
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UNIMPLEMENTED(FATAL);
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}
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} // namespace art
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