677 lines
20 KiB
C++
677 lines
20 KiB
C++
/*
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* Copyright (C) 2012 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_COMPILER_DEX_COMPILER_ENUMS_H_
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#define ART_COMPILER_DEX_COMPILER_ENUMS_H_
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#include "dex_instruction.h"
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namespace art {
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enum RegisterClass {
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kInvalidRegClass,
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kCoreReg,
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kFPReg,
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kRefReg,
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kAnyReg,
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};
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std::ostream& operator<<(std::ostream& os, const RegisterClass& rhs);
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enum BitsUsed {
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kSize32Bits,
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kSize64Bits,
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kSize128Bits,
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kSize256Bits,
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kSize512Bits,
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kSize1024Bits,
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};
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std::ostream& operator<<(std::ostream& os, const BitsUsed& rhs);
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enum SpecialTargetRegister {
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kSelf, // Thread pointer.
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kSuspend, // Used to reduce suspend checks for some targets.
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kLr,
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kPc,
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kSp,
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kArg0,
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kArg1,
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kArg2,
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kArg3,
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kArg4,
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kArg5,
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kArg6,
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kArg7,
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kFArg0,
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kFArg1,
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kFArg2,
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kFArg3,
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kFArg4,
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kFArg5,
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kFArg6,
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kFArg7,
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kFArg8,
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kFArg9,
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kFArg10,
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kFArg11,
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kFArg12,
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kFArg13,
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kFArg14,
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kFArg15,
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kRet0,
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kRet1,
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kInvokeTgt,
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kHiddenArg,
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kHiddenFpArg,
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kCount
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};
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std::ostream& operator<<(std::ostream& os, const SpecialTargetRegister& code);
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enum RegLocationType {
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kLocDalvikFrame = 0, // Normal Dalvik register
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kLocPhysReg,
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kLocCompilerTemp,
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kLocInvalid
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};
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std::ostream& operator<<(std::ostream& os, const RegLocationType& rhs);
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enum BBType {
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kNullBlock,
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kEntryBlock,
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kDalvikByteCode,
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kExitBlock,
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kExceptionHandling,
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kDead,
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};
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std::ostream& operator<<(std::ostream& os, const BBType& code);
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// Shared pseudo opcodes - must be < 0.
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enum LIRPseudoOpcode {
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kPseudoPrologueBegin = -18,
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kPseudoPrologueEnd = -17,
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kPseudoEpilogueBegin = -16,
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kPseudoEpilogueEnd = -15,
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kPseudoExportedPC = -14,
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kPseudoSafepointPC = -13,
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kPseudoIntrinsicRetry = -12,
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kPseudoSuspendTarget = -11,
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kPseudoThrowTarget = -10,
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kPseudoCaseLabel = -9,
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kPseudoBarrier = -8,
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kPseudoEntryBlock = -7,
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kPseudoExitBlock = -6,
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kPseudoTargetLabel = -5,
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kPseudoDalvikByteCodeBoundary = -4,
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kPseudoPseudoAlign4 = -3,
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kPseudoEHBlockLabel = -2,
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kPseudoNormalBlockLabel = -1,
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};
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std::ostream& operator<<(std::ostream& os, const LIRPseudoOpcode& rhs);
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enum ExtendedMIROpcode {
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kMirOpFirst = kNumPackedOpcodes,
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kMirOpPhi = kMirOpFirst,
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// @brief Copy from one VR to another.
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// @details
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// vA: destination VR
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// vB: source VR
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kMirOpCopy,
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// @brief Used to do float comparison with less-than bias.
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// @details Unlike cmpl-float, this does not store result of comparison in VR.
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// vA: left-hand side VR for comparison.
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// vB: right-hand side VR for comparison.
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kMirOpFusedCmplFloat,
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// @brief Used to do float comparison with greater-than bias.
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// @details Unlike cmpg-float, this does not store result of comparison in VR.
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// vA: left-hand side VR for comparison.
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// vB: right-hand side VR for comparison.
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kMirOpFusedCmpgFloat,
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// @brief Used to do double comparison with less-than bias.
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// @details Unlike cmpl-double, this does not store result of comparison in VR.
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// vA: left-hand side wide VR for comparison.
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// vB: right-hand side wide VR for comparison.
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kMirOpFusedCmplDouble,
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// @brief Used to do double comparison with greater-than bias.
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// @details Unlike cmpl-double, this does not store result of comparison in VR.
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// vA: left-hand side wide VR for comparison.
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// vB: right-hand side wide VR for comparison.
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kMirOpFusedCmpgDouble,
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// @brief Used to do comparison of 64-bit long integers.
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// @details Unlike cmp-long, this does not store result of comparison in VR.
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// vA: left-hand side wide VR for comparison.
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// vB: right-hand side wide VR for comparison.
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kMirOpFusedCmpLong,
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// @brief This represents no-op.
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kMirOpNop,
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// @brief Do a null check on the object register.
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// @details The backends may implement this implicitly or explicitly. This MIR is guaranteed
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// to have the correct offset as an exception thrower.
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// vA: object register
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kMirOpNullCheck,
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kMirOpRangeCheck,
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kMirOpDivZeroCheck,
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kMirOpCheck,
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kMirOpSelect,
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// Vector opcodes:
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// TypeSize is an encoded field giving the element type and the vector size.
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// It is encoded as OpSize << 16 | (number of bits in vector)
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//
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// Destination and source are integers that will be interpreted by the
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// backend that supports Vector operations. Backends are permitted to support only
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// certain vector register sizes.
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//
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// At this point, only two operand instructions are supported. Three operand instructions
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// could be supported by using a bit in TypeSize and arg[0] where needed.
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// @brief MIR to move constant data to a vector register
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// vA: destination
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// vB: number of bits in register
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// args[0]~args[3]: up to 128 bits of data for initialization
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kMirOpConstVector,
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// @brief MIR to move a vectorized register to another
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// vA: destination
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// vB: source
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// vC: TypeSize
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kMirOpMoveVector,
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// @brief Packed multiply of units in two vector registers: vB = vB .* vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: source
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// vC: TypeSize
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kMirOpPackedMultiply,
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// @brief Packed addition of units in two vector registers: vB = vB .+ vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: source
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// vC: TypeSize
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kMirOpPackedAddition,
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// @brief Packed subtraction of units in two vector registers: vB = vB .- vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: source
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// vC: TypeSize
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kMirOpPackedSubtract,
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// @brief Packed shift left of units in two vector registers: vB = vB .<< vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: amount to shift
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// vC: TypeSize
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kMirOpPackedShiftLeft,
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// @brief Packed signed shift right of units in two vector registers: vB = vB .>> vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: amount to shift
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// vC: TypeSize
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kMirOpPackedSignedShiftRight,
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// @brief Packed unsigned shift right of units in two vector registers: vB = vB .>>> vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: amount to shift
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// vC: TypeSize
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kMirOpPackedUnsignedShiftRight,
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// @brief Packed bitwise and of units in two vector registers: vB = vB .& vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: source
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// vC: TypeSize
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kMirOpPackedAnd,
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// @brief Packed bitwise or of units in two vector registers: vB = vB .| vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: source
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// vC: TypeSize
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kMirOpPackedOr,
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// @brief Packed bitwise xor of units in two vector registers: vB = vB .^ vC using vA to know the type of the vector.
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// vA: destination and source
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// vB: source
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// vC: TypeSize
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kMirOpPackedXor,
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// @brief Reduce a 128-bit packed element into a single VR by taking lower bits
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// @details Instruction does a horizontal addition of the packed elements and then adds it to VR
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// vA: destination and source VR (not vector register)
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// vB: source (vector register)
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// vC: TypeSize
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kMirOpPackedAddReduce,
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// @brief Extract a packed element into a single VR.
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// vA: destination VR (not vector register)
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// vB: source (vector register)
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// vC: TypeSize
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// arg[0]: The index to use for extraction from vector register (which packed element)
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kMirOpPackedReduce,
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// @brief Create a vector value, with all TypeSize values equal to vC
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// vA: destination vector register
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// vB: source VR (not vector register)
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// vC: TypeSize
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kMirOpPackedSet,
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// @brief Reserve a range of vector registers.
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// vA: Start vector register to reserve.
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// vB: Inclusive end vector register to reserve.
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// @note: The backend may choose to map vector numbers used in vector opcodes.
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// Reserved registers are removed from the list of backend temporary pool.
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kMirOpReserveVectorRegisters,
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// @brief Free a range of reserved vector registers
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// vA: Start vector register to unreserve.
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// vB: Inclusive end vector register to unreserve.
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// @note: All currently reserved vector registers are returned to the temporary pool.
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kMirOpReturnVectorRegisters,
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// @brief Create a memory barrier.
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// vA: a constant defined by enum MemBarrierKind.
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kMirOpMemBarrier,
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// @brief Used to fill a vector register with array values.
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// @details Just as with normal arrays, access on null object register must ensure NullPointerException
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// and invalid index must ensure ArrayIndexOutOfBoundsException. Exception behavior must be the same
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// as the aget it replaced and must happen at same index. Therefore, it is generally recommended that
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// before using this MIR, it is proven that exception is guaranteed to not be thrown and marked with
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// MIR_IGNORE_NULL_CHECK and MIR_IGNORE_RANGE_CHECK.
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// vA: destination vector register
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// vB: array register
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// vC: index register
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// arg[0]: TypeSize (most other vector opcodes have this in vC)
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kMirOpPackedArrayGet,
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// @brief Used to store a vector register into array.
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// @details Just as with normal arrays, access on null object register must ensure NullPointerException
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// and invalid index must ensure ArrayIndexOutOfBoundsException. Exception behavior must be the same
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// as the aget it replaced and must happen at same index. Therefore, it is generally recommended that
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// before using this MIR, it is proven that exception is guaranteed to not be thrown and marked with
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// MIR_IGNORE_NULL_CHECK and MIR_IGNORE_RANGE_CHECK.
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// vA: source vector register
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// vB: array register
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// vC: index register
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// arg[0]: TypeSize (most other vector opcodes have this in vC)
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kMirOpPackedArrayPut,
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// @brief Multiply-add integer.
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// vA: destination
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// vB: multiplicand
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// vC: multiplier
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// arg[0]: addend
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kMirOpMaddInt,
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// @brief Multiply-subtract integer.
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// vA: destination
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// vB: multiplicand
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// vC: multiplier
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// arg[0]: minuend
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kMirOpMsubInt,
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// @brief Multiply-add long.
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// vA: destination
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// vB: multiplicand
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// vC: multiplier
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// arg[0]: addend
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kMirOpMaddLong,
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// @brief Multiply-subtract long.
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// vA: destination
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// vB: multiplicand
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// vC: multiplier
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// arg[0]: minuend
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kMirOpMsubLong,
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kMirOpLast,
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};
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enum MIROptimizationFlagPositions {
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kMIRIgnoreNullCheck = 0,
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kMIRIgnoreRangeCheck,
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kMIRIgnoreCheckCast,
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kMIRStoreNonNullValue, // Storing non-null value, always mark GC card.
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kMIRClassIsInitialized,
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kMIRClassIsInDexCache,
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kMirIgnoreDivZeroCheck,
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kMIRInlined, // Invoke is inlined (ie dead).
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kMIRInlinedPred, // Invoke is inlined via prediction.
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kMIRCallee, // Instruction is inlined from callee.
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kMIRIgnoreSuspendCheck,
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kMIRDup,
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kMIRMark, // Temporary node mark can be used by
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// opt passes for their private needs.
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kMIRStoreNonTemporal,
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kMIRLastMIRFlag,
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};
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// For successor_block_list.
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enum BlockListType {
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kNotUsed = 0,
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kCatch,
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kPackedSwitch,
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kSparseSwitch,
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};
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std::ostream& operator<<(std::ostream& os, const BlockListType& rhs);
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enum AssemblerStatus {
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kSuccess,
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kRetryAll,
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};
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std::ostream& operator<<(std::ostream& os, const AssemblerStatus& rhs);
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enum OpSize {
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kWord, // Natural word size of target (32/64).
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k32,
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k64,
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kReference, // Object reference; compressed on 64-bit targets.
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kSingle,
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kDouble,
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kUnsignedHalf,
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kSignedHalf,
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kUnsignedByte,
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kSignedByte,
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};
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std::ostream& operator<<(std::ostream& os, const OpSize& kind);
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enum OpKind {
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kOpMov,
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kOpCmov,
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kOpMvn,
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kOpCmp,
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kOpLsl,
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kOpLsr,
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kOpAsr,
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kOpRor,
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kOpNot,
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kOpAnd,
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kOpOr,
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kOpXor,
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kOpNeg,
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kOpAdd,
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kOpAdc,
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kOpSub,
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kOpSbc,
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kOpRsub,
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kOpMul,
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kOpDiv,
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kOpRem,
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kOpBic,
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kOpCmn,
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kOpTst,
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kOpRev,
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kOpRevsh,
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kOpBkpt,
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kOpBlx,
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kOpPush,
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kOpPop,
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kOp2Char,
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kOp2Short,
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kOp2Byte,
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kOpCondBr,
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kOpUncondBr,
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kOpBx,
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kOpInvalid,
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};
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std::ostream& operator<<(std::ostream& os, const OpKind& rhs);
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enum MoveType {
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kMov8GP, // Move 8-bit general purpose register.
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kMov16GP, // Move 16-bit general purpose register.
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kMov32GP, // Move 32-bit general purpose register.
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kMov64GP, // Move 64-bit general purpose register.
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kMov32FP, // Move 32-bit FP register.
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kMov64FP, // Move 64-bit FP register.
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kMovLo64FP, // Move low 32-bits of 64-bit FP register.
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kMovHi64FP, // Move high 32-bits of 64-bit FP register.
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kMovU128FP, // Move 128-bit FP register to/from possibly unaligned region.
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kMov128FP = kMovU128FP,
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kMovA128FP, // Move 128-bit FP register to/from region surely aligned to 16-bytes.
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kMovLo128FP, // Move low 64-bits of 128-bit FP register.
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kMovHi128FP, // Move high 64-bits of 128-bit FP register.
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};
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std::ostream& operator<<(std::ostream& os, const MoveType& kind);
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enum ConditionCode {
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kCondEq, // equal
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kCondNe, // not equal
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kCondCs, // carry set
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kCondCc, // carry clear
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kCondUlt, // unsigned less than
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kCondUge, // unsigned greater than or same
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kCondMi, // minus
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kCondPl, // plus, positive or zero
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kCondVs, // overflow
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kCondVc, // no overflow
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kCondHi, // unsigned greater than
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kCondLs, // unsigned lower or same
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kCondGe, // signed greater than or equal
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kCondLt, // signed less than
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kCondGt, // signed greater than
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kCondLe, // signed less than or equal
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kCondAl, // always
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kCondNv, // never
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};
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std::ostream& operator<<(std::ostream& os, const ConditionCode& kind);
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// Target specific condition encodings
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enum ArmConditionCode {
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kArmCondEq = 0x0, // 0000
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kArmCondNe = 0x1, // 0001
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kArmCondCs = 0x2, // 0010
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kArmCondCc = 0x3, // 0011
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kArmCondMi = 0x4, // 0100
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kArmCondPl = 0x5, // 0101
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kArmCondVs = 0x6, // 0110
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kArmCondVc = 0x7, // 0111
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kArmCondHi = 0x8, // 1000
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kArmCondLs = 0x9, // 1001
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kArmCondGe = 0xa, // 1010
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kArmCondLt = 0xb, // 1011
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kArmCondGt = 0xc, // 1100
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kArmCondLe = 0xd, // 1101
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kArmCondAl = 0xe, // 1110
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kArmCondNv = 0xf, // 1111
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};
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std::ostream& operator<<(std::ostream& os, const ArmConditionCode& kind);
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enum X86ConditionCode {
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kX86CondO = 0x0, // overflow
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kX86CondNo = 0x1, // not overflow
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kX86CondB = 0x2, // below
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kX86CondNae = kX86CondB, // not-above-equal
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kX86CondC = kX86CondB, // carry
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kX86CondNb = 0x3, // not-below
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kX86CondAe = kX86CondNb, // above-equal
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kX86CondNc = kX86CondNb, // not-carry
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kX86CondZ = 0x4, // zero
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kX86CondEq = kX86CondZ, // equal
|
|
|
|
kX86CondNz = 0x5, // not-zero
|
|
kX86CondNe = kX86CondNz, // not-equal
|
|
|
|
kX86CondBe = 0x6, // below-equal
|
|
kX86CondNa = kX86CondBe, // not-above
|
|
|
|
kX86CondNbe = 0x7, // not-below-equal
|
|
kX86CondA = kX86CondNbe, // above
|
|
|
|
kX86CondS = 0x8, // sign
|
|
kX86CondNs = 0x9, // not-sign
|
|
|
|
kX86CondP = 0xa, // 8-bit parity even
|
|
kX86CondPE = kX86CondP,
|
|
|
|
kX86CondNp = 0xb, // 8-bit parity odd
|
|
kX86CondPo = kX86CondNp,
|
|
|
|
kX86CondL = 0xc, // less-than
|
|
kX86CondNge = kX86CondL, // not-greater-equal
|
|
|
|
kX86CondNl = 0xd, // not-less-than
|
|
kX86CondGe = kX86CondNl, // not-greater-equal
|
|
|
|
kX86CondLe = 0xe, // less-than-equal
|
|
kX86CondNg = kX86CondLe, // not-greater
|
|
|
|
kX86CondNle = 0xf, // not-less-than
|
|
kX86CondG = kX86CondNle, // greater
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const X86ConditionCode& kind);
|
|
|
|
enum DividePattern {
|
|
DivideNone,
|
|
Divide3,
|
|
Divide5,
|
|
Divide7,
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const DividePattern& pattern);
|
|
|
|
/**
|
|
* @brief Memory barrier types (see "The JSR-133 Cookbook for Compiler Writers").
|
|
* @details We define the combined barrier types that are actually required
|
|
* by the Java Memory Model, rather than using exactly the terminology from
|
|
* the JSR-133 cookbook. These should, in many cases, be replaced by acquire/release
|
|
* primitives. Note that the JSR-133 cookbook generally does not deal with
|
|
* store atomicity issues, and the recipes there are not always entirely sufficient.
|
|
* The current recipe is as follows:
|
|
* -# Use AnyStore ~= (LoadStore | StoreStore) ~= release barrier before volatile store.
|
|
* -# Use AnyAny barrier after volatile store. (StoreLoad is as expensive.)
|
|
* -# Use LoadAny barrier ~= (LoadLoad | LoadStore) ~= acquire barrier after each volatile load.
|
|
* -# Use StoreStore barrier after all stores but before return from any constructor whose
|
|
* class has final fields.
|
|
* -# Use NTStoreStore to order non-temporal stores with respect to all later
|
|
* store-to-memory instructions. Only generated together with non-temporal stores.
|
|
*/
|
|
enum MemBarrierKind {
|
|
kAnyStore,
|
|
kLoadAny,
|
|
kStoreStore,
|
|
kAnyAny,
|
|
kNTStoreStore,
|
|
kLastBarrierKind = kNTStoreStore
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const MemBarrierKind& kind);
|
|
|
|
enum OpFeatureFlags {
|
|
kIsBranch = 0,
|
|
kNoOperand,
|
|
kIsUnaryOp,
|
|
kIsBinaryOp,
|
|
kIsTertiaryOp,
|
|
kIsQuadOp,
|
|
kIsQuinOp,
|
|
kIsSextupleOp,
|
|
kIsIT,
|
|
kIsMoveOp,
|
|
kMemLoad,
|
|
kMemStore,
|
|
kMemVolatile,
|
|
kMemScaledx0,
|
|
kMemScaledx2,
|
|
kMemScaledx4,
|
|
kPCRelFixup, // x86 FIXME: add NEEDS_FIXUP to instruction attributes.
|
|
kRegDef0,
|
|
kRegDef1,
|
|
kRegDef2,
|
|
kRegDefA,
|
|
kRegDefD,
|
|
kRegDefFPCSList0,
|
|
kRegDefFPCSList2,
|
|
kRegDefList0,
|
|
kRegDefList1,
|
|
kRegDefList2,
|
|
kRegDefLR,
|
|
kRegDefSP,
|
|
kRegUse0,
|
|
kRegUse1,
|
|
kRegUse2,
|
|
kRegUse3,
|
|
kRegUse4,
|
|
kRegUseA,
|
|
kRegUseC,
|
|
kRegUseD,
|
|
kRegUseB,
|
|
kRegUseFPCSList0,
|
|
kRegUseFPCSList2,
|
|
kRegUseList0,
|
|
kRegUseList1,
|
|
kRegUseLR,
|
|
kRegUsePC,
|
|
kRegUseSP,
|
|
kSetsCCodes,
|
|
kUsesCCodes,
|
|
kUseFpStack,
|
|
kUseHi,
|
|
kUseLo,
|
|
kDefHi,
|
|
kDefLo
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const OpFeatureFlags& rhs);
|
|
|
|
enum SelectInstructionKind {
|
|
kSelectNone,
|
|
kSelectConst,
|
|
kSelectMove,
|
|
kSelectGoto
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const SelectInstructionKind& kind);
|
|
|
|
// LIR fixup kinds for Arm and X86.
|
|
enum FixupKind {
|
|
kFixupNone,
|
|
kFixupLabel, // For labels we just adjust the offset.
|
|
kFixupLoad, // Mostly for immediates.
|
|
kFixupVLoad, // FP load which *may* be pc-relative.
|
|
kFixupCBxZ, // Cbz, Cbnz.
|
|
kFixupTBxZ, // Tbz, Tbnz.
|
|
kFixupCondBranch, // Conditional branch
|
|
kFixupT1Branch, // Thumb1 Unconditional branch
|
|
kFixupT2Branch, // Thumb2 Unconditional branch
|
|
kFixupBlx1, // Blx1 (start of Blx1/Blx2 pair).
|
|
kFixupBl1, // Bl1 (start of Bl1/Bl2 pair).
|
|
kFixupAdr, // Adr.
|
|
kFixupMovImmLST, // kThumb2MovImm16LST.
|
|
kFixupMovImmHST, // kThumb2MovImm16HST.
|
|
kFixupAlign4, // Align to 4-byte boundary.
|
|
kFixupA53Erratum835769, // Cortex A53 Erratum 835769.
|
|
kFixupSwitchTable, // X86_64 packed switch table.
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const FixupKind& kind);
|
|
|
|
enum VolatileKind {
|
|
kNotVolatile, // Load/Store is not volatile
|
|
kVolatile // Load/Store is volatile
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const VolatileKind& kind);
|
|
|
|
enum WideKind {
|
|
kNotWide, // Non-wide view
|
|
kWide, // Wide view
|
|
kRef // Ref width
|
|
};
|
|
std::ostream& operator<<(std::ostream& os, const WideKind& kind);
|
|
|
|
} // namespace art
|
|
|
|
#endif // ART_COMPILER_DEX_COMPILER_ENUMS_H_
|