34 lines
1.7 KiB
ArmAsm
34 lines
1.7 KiB
ArmAsm
%default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
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/*
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* Generic 64-bit binary operation. Provide an "instr" line that
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* specifies an instruction that performs "result = a0-a1 op a2-a3".
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* This could be a MIPS instruction or a function call. (If the result
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* comes back in a register pair other than a0-a1, you can override "result".)
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*
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* If "chkzero" is set to 1, we perform a divide-by-zero check on
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* vCC (a2-a3). Useful for integer division and modulus.
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*
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* for: add-long, sub-long, div-long, rem-long, and-long, or-long,
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* xor-long
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*
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* IMPORTANT: you may specify "chkzero" or "preinstr" but not both.
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*/
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/* binop vAA, vBB, vCC */
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FETCH(a0, 1) # a0 <- CCBB
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GET_OPA(rOBJ) # rOBJ <- AA
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and a2, a0, 255 # a2 <- BB
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srl a3, a0, 8 # a3 <- CC
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EAS2(a2, rFP, a2) # a2 <- &fp[BB]
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EAS2(t1, rFP, a3) # a3 <- &fp[CC]
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LOAD64($arg0, $arg1, a2) # a0/a1 <- vBB/vBB+1
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LOAD64($arg2, $arg3, t1) # a2/a3 <- vCC/vCC+1
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.if $chkzero
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or t0, $arg2, $arg3 # second arg (a2-a3) is zero?
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beqz t0, common_errDivideByZero
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.endif
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FETCH_ADVANCE_INST(2) # advance rPC, load rINST
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$preinstr # optional op
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$instr # result <- op, a0-a3 changed
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GET_INST_OPCODE(t0) # extract opcode from rINST
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SET_VREG64_GOTO($result0, $result1, rOBJ, t0) # vAA/vAA+1 <- $result0/$result1
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