28 lines
1.3 KiB
ArmAsm
28 lines
1.3 KiB
ArmAsm
%default {"preinstr":"", "result":"a0", "chkzero":"0"}
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/*
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* Generic 32-bit "lit16" binary operation. Provide an "instr" line
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* that specifies an instruction that performs "result = a0 op a1".
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* This could be an MIPS instruction or a function call. (If the result
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* comes back in a register other than a0, you can override "result".)
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*
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* If "chkzero" is set to 1, we perform a divide-by-zero check on
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* vCC (a1). Useful for integer division and modulus.
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*
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* For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
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* rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
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*/
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/* binop/lit16 vA, vB, +CCCC */
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FETCH_S(a1, 1) # a1 <- ssssCCCC (sign-extended)
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GET_OPB(a2) # a2 <- B
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GET_OPA4(rOBJ) # rOBJ <- A+
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GET_VREG(a0, a2) # a0 <- vB
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.if $chkzero
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# cmp a1, 0; is second operand zero?
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beqz a1, common_errDivideByZero
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.endif
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FETCH_ADVANCE_INST(2) # advance rPC, load rINST
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$preinstr # optional op
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$instr # $result <- op, a0-a3 changed
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GET_INST_OPCODE(t0) # extract opcode from rINST
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SET_VREG_GOTO($result, rOBJ, t0) # vA <- $result
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