147 lines
4.2 KiB
C++
147 lines
4.2 KiB
C++
/*
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* Copyright (C) 2014 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
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#define ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
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#include <stdint.h>
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#include <memory>
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#include <vector>
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#include "base/arena_containers.h"
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#include "base/logging.h"
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#include "utils/arm64/managed_register_arm64.h"
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#include "utils/assembler.h"
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#include "offsets.h"
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// TODO(VIXL): Make VIXL compile with -Wshadow.
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wshadow"
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#include "aarch64/disasm-aarch64.h"
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#include "aarch64/macro-assembler-aarch64.h"
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#pragma GCC diagnostic pop
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namespace art {
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namespace arm64 {
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#define MEM_OP(...) vixl::aarch64::MemOperand(__VA_ARGS__)
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enum LoadOperandType {
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kLoadSignedByte,
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kLoadUnsignedByte,
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kLoadSignedHalfword,
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kLoadUnsignedHalfword,
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kLoadWord,
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kLoadCoreWord,
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kLoadSWord,
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kLoadDWord
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};
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enum StoreOperandType {
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kStoreByte,
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kStoreHalfword,
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kStoreWord,
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kStoreCoreWord,
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kStoreSWord,
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kStoreDWord
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};
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class Arm64Assembler FINAL : public Assembler {
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public:
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explicit Arm64Assembler(ArenaAllocator* arena) : Assembler(arena) {}
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virtual ~Arm64Assembler() {}
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vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return &vixl_masm_; }
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// Finalize the code.
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void FinalizeCode() OVERRIDE;
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// Size of generated code.
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size_t CodeSize() const OVERRIDE;
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const uint8_t* CodeBufferBaseAddress() const OVERRIDE;
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// Copy instructions out of assembly buffer into the given region of memory.
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void FinalizeInstructions(const MemoryRegion& region);
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void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs);
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void SpillRegisters(vixl::aarch64::CPURegList registers, int offset);
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void UnspillRegisters(vixl::aarch64::CPURegList registers, int offset);
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// Jump to address (not setting link register)
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void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch);
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//
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// Heap poisoning.
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//
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// Poison a heap reference contained in `reg`.
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void PoisonHeapReference(vixl::aarch64::Register reg);
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// Unpoison a heap reference contained in `reg`.
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void UnpoisonHeapReference(vixl::aarch64::Register reg);
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// Poison a heap reference contained in `reg` if heap poisoning is enabled.
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void MaybePoisonHeapReference(vixl::aarch64::Register reg);
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// Unpoison a heap reference contained in `reg` if heap poisoning is enabled.
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void MaybeUnpoisonHeapReference(vixl::aarch64::Register reg);
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void Bind(Label* label ATTRIBUTE_UNUSED) OVERRIDE {
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UNIMPLEMENTED(FATAL) << "Do not use Bind for ARM64";
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}
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void Jump(Label* label ATTRIBUTE_UNUSED) OVERRIDE {
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UNIMPLEMENTED(FATAL) << "Do not use Jump for ARM64";
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}
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static vixl::aarch64::Register reg_x(int code) {
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CHECK(code < kNumberOfXRegisters) << code;
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if (code == SP) {
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return vixl::aarch64::sp;
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} else if (code == XZR) {
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return vixl::aarch64::xzr;
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}
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return vixl::aarch64::Register::GetXRegFromCode(code);
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}
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static vixl::aarch64::Register reg_w(int code) {
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CHECK(code < kNumberOfWRegisters) << code;
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if (code == WSP) {
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return vixl::aarch64::wsp;
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} else if (code == WZR) {
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return vixl::aarch64::wzr;
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}
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return vixl::aarch64::Register::GetWRegFromCode(code);
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}
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static vixl::aarch64::FPRegister reg_d(int code) {
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return vixl::aarch64::FPRegister::GetDRegFromCode(code);
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}
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static vixl::aarch64::FPRegister reg_s(int code) {
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return vixl::aarch64::FPRegister::GetSRegFromCode(code);
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}
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private:
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// VIXL assembler.
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vixl::aarch64::MacroAssembler vixl_masm_;
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// Used for testing.
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friend class Arm64ManagedRegister_VixlRegisters_Test;
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};
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} // namespace arm64
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} // namespace art
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#endif // ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
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