29 lines
1.4 KiB
ArmAsm
29 lines
1.4 KiB
ArmAsm
%default {"preinstr":"", "result":"a0", "chkzero":"0"}
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/*
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* Generic 32-bit "lit8" binary operation. Provide an "instr" line
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* that specifies an instruction that performs "result = a0 op a1".
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* This could be an MIPS instruction or a function call. (If the result
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* comes back in a register other than a0, you can override "result".)
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*
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* If "chkzero" is set to 1, we perform a divide-by-zero check on
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* CC (a1). Useful for integer division and modulus.
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*
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* For: add-int/lit8, rsub-int/lit8, mul-int/lit8, div-int/lit8,
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* rem-int/lit8, and-int/lit8, or-int/lit8, xor-int/lit8,
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* shl-int/lit8, shr-int/lit8, ushr-int/lit8
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*/
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/* binop/lit8 vAA, vBB, #+CC */
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lbu a3, 2(rPC) # a3 <- BB
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lb a1, 3(rPC) # a1 <- sign-extended CC
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srl a2, rINST, 8 # a2 <- AA
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GET_VREG a0, a3 # a0 <- vBB
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.if $chkzero
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beqz a1, common_errDivideByZero # is second operand zero?
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.endif
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FETCH_ADVANCE_INST 2 # advance rPC, load rINST
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$preinstr # optional op
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$instr # $result <- op, a0-a3 changed
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GET_INST_OPCODE v0 # extract opcode from rINST
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SET_VREG $result, a2 # vAA <- $result
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GOTO_OPCODE v0 # jump to next instruction
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