19 lines
852 B
ArmAsm
19 lines
852 B
ArmAsm
%default {"opcode":"shl"}
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/*
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* 64-bit shift operation.
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*
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* For: shl-long, shr-long, ushr-long
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*/
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/* binop vAA, vBB, vCC */
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FETCH w0, 1 // w0<- CCBB
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lsr w3, wINST, #8 // w3<- AA
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lsr w2, w0, #8 // w2<- CC
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GET_VREG w2, w2 // w2<- vCC (shift count)
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and w1, w0, #255 // w1<- BB
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GET_VREG_WIDE x1, w1 // x1<- vBB
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FETCH_ADVANCE_INST 2 // advance rPC, load rINST
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$opcode x0, x1, x2 // Do the shift. Only low 6 bits of x2 are used.
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GET_INST_OPCODE ip // extract opcode from rINST
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SET_VREG_WIDE x0, w3 // vAA<- x0
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GOTO_OPCODE ip // jump to next instruction
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/* 11-14 instructions */
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