30 lines
1.5 KiB
ArmAsm
30 lines
1.5 KiB
ArmAsm
%default {"preinstr":"", "instr":"add x0, x1, x2", "result":"x0", "r1":"x1", "r2":"x2", "chkzero":"0"}
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/*
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* Generic 64-bit binary operation. Provide an "instr" line that
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* specifies an instruction that performs "result = x1 op x2".
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* This could be an ARM instruction or a function call. (If the result
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* comes back in a register other than x0, you can override "result".)
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*
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* If "chkzero" is set to 1, we perform a divide-by-zero check on
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* vCC (w1). Useful for integer division and modulus.
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*
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* For: add-long, sub-long, mul-long, div-long, rem-long, and-long, or-long,
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* xor-long, add-double, sub-double, mul-double, div-double, rem-double
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*/
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/* binop vAA, vBB, vCC */
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FETCH w0, 1 // w0<- CCBB
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lsr w4, wINST, #8 // w4<- AA
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lsr w2, w0, #8 // w2<- CC
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and w1, w0, #255 // w1<- BB
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GET_VREG_WIDE $r2, w2 // w2<- vCC
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GET_VREG_WIDE $r1, w1 // w1<- vBB
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.if $chkzero
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cbz $r2, common_errDivideByZero // is second operand zero?
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.endif
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FETCH_ADVANCE_INST 2 // advance rPC, load rINST
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$preinstr
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$instr // $result<- op, w0-w4 changed
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GET_INST_OPCODE ip // extract opcode from rINST
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SET_VREG_WIDE $result, w4 // vAA<- $result
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GOTO_OPCODE ip // jump to next instruction
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/* 11-14 instructions */
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