29 lines
1.3 KiB
ArmAsm
29 lines
1.3 KiB
ArmAsm
%default {"result":"r0", "chkzero":"0"}
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/*
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* Generic 32-bit "lit16" binary operation. Provide an "instr" line
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* that specifies an instruction that performs "result = r0 op r1".
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* This could be an ARM instruction or a function call. (If the result
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* comes back in a register other than r0, you can override "result".)
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*
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* If "chkzero" is set to 1, we perform a divide-by-zero check on
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* vCC (r1). Useful for integer division and modulus.
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*
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* For: add-int/lit16, rsub-int, mul-int/lit16, div-int/lit16,
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* rem-int/lit16, and-int/lit16, or-int/lit16, xor-int/lit16
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*/
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/* binop/lit16 vA, vB, #+CCCC */
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FETCH_S r1, 1 @ r1<- ssssCCCC (sign-extended)
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mov r2, rINST, lsr #12 @ r2<- B
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ubfx r9, rINST, #8, #4 @ r9<- A
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GET_VREG r0, r2 @ r0<- vB
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.if $chkzero
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cmp r1, #0 @ is second operand zero?
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beq common_errDivideByZero
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.endif
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FETCH_ADVANCE_INST 2 @ advance rPC, load rINST
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$instr @ $result<- op, r0-r3 changed
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GET_INST_OPCODE ip @ extract opcode from rINST
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SET_VREG $result, r9 @ vAA<- $result
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GOTO_OPCODE ip @ jump to next instruction
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/* 10-13 instructions */
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