upload android base code part3
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424
android/bionic/libm/amd64/fenv.c
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android/bionic/libm/amd64/fenv.c
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/* $OpenBSD: fenv.c,v 1.3 2012/12/05 23:20:02 deraadt Exp $ */
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/* $NetBSD: fenv.c,v 1.1 2010/07/31 21:47:53 joerg Exp $ */
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/*-
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* Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <fenv.h>
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/*
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* The i387 defaults to Intel extended precision mode and round to nearest,
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* with all exceptions masked.
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*/
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#define __INITIAL_NPXCW__ 0x037f
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#define __INITIAL_MXCSR__ 0x1f80
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#define __INITIAL_MXCSR_MASK__ 0xffbf
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#define SSE_MASK_SHIFT 7
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/*
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* The following symbol is simply the bitwise-inclusive OR of all floating-point
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* rounding direction constants defined above.
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*/
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#define X87_ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | FE_UPWARD | FE_TOWARDZERO)
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#define SSE_ROUND_SHIFT 3
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/*
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* The following constant represents the default floating-point environment
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* (that is, the one installed at program startup) and has type pointer to
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* const-qualified fenv_t.
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*
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* It can be used as an argument to the functions within the <fenv.h> header
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* that manage the floating-point environment, namely fesetenv() and
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* feupdateenv().
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*
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* x87 fpu registers are 16bit wide. The upper bits, 31-16, are marked as
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* RESERVED.
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*/
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const fenv_t __fe_dfl_env = {
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{
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0xffff0000 | __INITIAL_NPXCW__, /* Control word register */
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0xffff0000, /* Status word register */
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0xffffffff, /* Tag word register */
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{
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0x00000000,
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0x00000000,
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0x00000000,
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0xffff0000
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}
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},
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__INITIAL_MXCSR__ /* MXCSR register */
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};
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/*
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* The feclearexcept() function clears the supported floating-point exceptions
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* represented by `excepts'.
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*/
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int
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feclearexcept(int excepts)
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{
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fenv_t fenv;
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unsigned int mxcsr;
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excepts &= FE_ALL_EXCEPT;
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/* Store the current x87 floating-point environment */
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__asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
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/* Clear the requested floating-point exceptions */
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fenv.__x87.__status &= ~excepts;
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/* Load the x87 floating-point environent */
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__asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
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/* Same for SSE environment */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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mxcsr &= ~excepts;
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__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
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return (0);
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}
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/*
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* The fegetexceptflag() function stores an implementation-defined
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* representation of the states of the floating-point status flags indicated by
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* the argument excepts in the object pointed to by the argument flagp.
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*/
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int
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fegetexceptflag(fexcept_t *flagp, int excepts)
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{
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unsigned short status;
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unsigned int mxcsr;
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excepts &= FE_ALL_EXCEPT;
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/* Store the current x87 status register */
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__asm__ __volatile__ ("fnstsw %0" : "=am" (status));
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/* Store the MXCSR register */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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/* Store the results in flagp */
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*flagp = (status | mxcsr) & excepts;
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return (0);
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}
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/*
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* The feraiseexcept() function raises the supported floating-point exceptions
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* represented by the argument `excepts'.
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*
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* The standard explicitly allows us to execute an instruction that has the
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* exception as a side effect, but we choose to manipulate the status register
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* directly.
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*
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* The validation of input is being deferred to fesetexceptflag().
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*/
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int
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feraiseexcept(int excepts)
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{
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excepts &= FE_ALL_EXCEPT;
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fesetexceptflag((fexcept_t *)&excepts, excepts);
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__asm__ __volatile__ ("fwait");
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return (0);
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}
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/*
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* This function sets the floating-point status flags indicated by the argument
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* `excepts' to the states stored in the object pointed to by `flagp'. It does
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* NOT raise any floating-point exceptions, but only sets the state of the flags.
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*/
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int
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fesetexceptflag(const fexcept_t *flagp, int excepts)
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{
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fenv_t fenv;
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unsigned int mxcsr;
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excepts &= FE_ALL_EXCEPT;
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/* Store the current x87 floating-point environment */
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__asm__ __volatile__ ("fnstenv %0" : "=m" (fenv));
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/* Set the requested status flags */
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fenv.__x87.__status &= ~excepts;
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fenv.__x87.__status |= *flagp & excepts;
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/* Load the x87 floating-point environent */
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__asm__ __volatile__ ("fldenv %0" : : "m" (fenv));
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/* Same for SSE environment */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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mxcsr &= ~excepts;
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mxcsr |= *flagp & excepts;
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__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
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return (0);
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}
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/*
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* The fetestexcept() function determines which of a specified subset of the
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* floating-point exception flags are currently set. The `excepts' argument
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* specifies the floating-point status flags to be queried.
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*/
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int
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fetestexcept(int excepts)
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{
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unsigned short status;
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unsigned int mxcsr;
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excepts &= FE_ALL_EXCEPT;
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/* Store the current x87 status register */
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__asm__ __volatile__ ("fnstsw %0" : "=am" (status));
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/* Store the MXCSR register state */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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return ((status | mxcsr) & excepts);
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}
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/*
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* The fegetround() function gets the current rounding direction.
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*/
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int
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fegetround(void)
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{
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unsigned short control;
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/*
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* We assume that the x87 and the SSE unit agree on the
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* rounding mode. Reading the control word on the x87 turns
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* out to be about 5 times faster than reading it on the SSE
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* unit on an Opteron 244.
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*/
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__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
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return (control & X87_ROUND_MASK);
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}
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/*
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* The fesetround() function establishes the rounding direction represented by
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* its argument `round'. If the argument is not equal to the value of a rounding
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* direction macro, the rounding direction is not changed.
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*/
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int
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fesetround(int round)
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{
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unsigned short control;
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unsigned int mxcsr;
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/* Check whether requested rounding direction is supported */
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if (round & ~X87_ROUND_MASK)
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return (-1);
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/* Store the current x87 control word register */
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__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
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/* Set the rounding direction */
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control &= ~X87_ROUND_MASK;
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control |= round;
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/* Load the x87 control word register */
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__asm__ __volatile__ ("fldcw %0" : : "m" (control));
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/* Same for the SSE environment */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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mxcsr &= ~(X87_ROUND_MASK << SSE_ROUND_SHIFT);
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mxcsr |= round << SSE_ROUND_SHIFT;
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__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
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return (0);
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}
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/*
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* The fegetenv() function attempts to store the current floating-point
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* environment in the object pointed to by envp.
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*/
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int
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fegetenv(fenv_t *envp)
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{
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/* Store the current x87 floating-point environment */
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__asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
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/* Store the MXCSR register state */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
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/*
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* When an FNSTENV instruction is executed, all pending exceptions are
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* essentially lost (either the x87 FPU status register is cleared or
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* all exceptions are masked).
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*
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* 8.6 X87 FPU EXCEPTION SYNCHRONIZATION -
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* Intel(R) 64 and IA-32 Architectures Softare Developer's Manual - Vol1
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*/
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__asm__ __volatile__ ("fldcw %0" : : "m" (envp->__x87.__control));
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return (0);
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}
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/*
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* The feholdexcept() function saves the current floating-point environment
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* in the object pointed to by envp, clears the floating-point status flags, and
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* then installs a non-stop (continue on floating-point exceptions) mode, if
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* available, for all floating-point exceptions.
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*/
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int
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feholdexcept(fenv_t *envp)
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{
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unsigned int mxcsr;
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/* Store the current x87 floating-point environment */
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__asm__ __volatile__ ("fnstenv %0" : "=m" (*envp));
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/* Clear all exception flags in FPU */
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__asm__ __volatile__ ("fnclex");
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/* Store the MXCSR register state */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (envp->__mxcsr));
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/* Clear exception flags in MXCSR */
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mxcsr = envp->__mxcsr;
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mxcsr &= ~FE_ALL_EXCEPT;
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/* Mask all exceptions */
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mxcsr |= FE_ALL_EXCEPT << SSE_MASK_SHIFT;
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/* Store the MXCSR register */
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__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
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return (0);
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}
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/*
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* The fesetenv() function attempts to establish the floating-point environment
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* represented by the object pointed to by envp. The argument `envp' points
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* to an object set by a call to fegetenv() or feholdexcept(), or equal a
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* floating-point environment macro. The fesetenv() function does not raise
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* floating-point exceptions, but only installs the state of the floating-point
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* status flags represented through its argument.
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*/
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int
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fesetenv(const fenv_t *envp)
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{
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/* Load the x87 floating-point environent */
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__asm__ __volatile__ ("fldenv %0" : : "m" (*envp));
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/* Store the MXCSR register */
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__asm__ __volatile__ ("ldmxcsr %0" : : "m" (envp->__mxcsr));
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return (0);
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}
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/*
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* The feupdateenv() function saves the currently raised floating-point
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* exceptions in its automatic storage, installs the floating-point environment
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* represented by the object pointed to by `envp', and then raises the saved
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* floating-point exceptions. The argument `envp' shall point to an object set
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* by a call to feholdexcept() or fegetenv(), or equal a floating-point
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* environment macro.
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*/
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int
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feupdateenv(const fenv_t *envp)
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{
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unsigned short status;
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unsigned int mxcsr;
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/* Store the x87 status register */
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__asm__ __volatile__ ("fnstsw %0" : "=am" (status));
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/* Store the MXCSR register */
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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/* Install new floating-point environment */
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fesetenv(envp);
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/* Raise any previously accumulated exceptions */
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feraiseexcept(status | mxcsr);
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return (0);
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}
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/*
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* The following functions are extentions to the standard
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*/
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int
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feenableexcept(int mask)
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{
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unsigned int mxcsr, omask;
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unsigned short control;
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mask &= FE_ALL_EXCEPT;
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__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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omask = ~(control | (mxcsr >> SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
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control &= ~mask;
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__asm__ __volatile__ ("fldcw %0" : : "m" (control));
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mxcsr &= ~(mask << SSE_MASK_SHIFT);
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__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
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return (omask);
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}
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int
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fedisableexcept(int mask)
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{
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unsigned int mxcsr, omask;
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unsigned short control;
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mask &= FE_ALL_EXCEPT;
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__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
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__asm__ __volatile__ ("stmxcsr %0" : "=m" (mxcsr));
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omask = ~(control | (mxcsr >> SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;
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control |= mask;
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__asm__ __volatile__ ("fldcw %0" : : "m" (control));
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mxcsr |= mask << SSE_MASK_SHIFT;
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__asm__ __volatile__ ("ldmxcsr %0" : : "m" (mxcsr));
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return (omask);
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}
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int
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fegetexcept(void)
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{
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unsigned short control;
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/*
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* We assume that the masks for the x87 and the SSE unit are
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* the same.
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*/
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__asm__ __volatile__ ("fnstcw %0" : "=m" (control));
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return (~control & FE_ALL_EXCEPT);
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}
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