10" lcd panel support

1. set output_mode to 0x45 for 1024x600 panel
2. set output_mode to 0x46 for 1280x800 panel
This commit is contained in:
August 2018-12-13 00:47:09 +08:00
parent 6f5aff25b6
commit 8e766dba19
18 changed files with 111 additions and 1 deletions

View file

@ -830,6 +830,14 @@ s32 bsp_disp_get_screen_width_from_output_type(u32 disp, u32 output_type, u32 ou
width = 900;
height = 540;
break;
case DISP_TV_MOD_1024_600P:
width = 1024;
height = 600;
break;
case DISP_TV_MOD_1280_800P:
width = 1280;
height = 800;
break;
}
}
/* FIXME: add other output device res */
@ -941,6 +949,14 @@ s32 bsp_disp_get_screen_height_from_output_type(u32 disp, u32 output_type, u32 o
width = 900;
height = 540;
break;
case DISP_TV_MOD_1024_600P:
width = 1024;
height = 600;
break;
case DISP_TV_MOD_1280_800P:
width = 1280;
height = 800;
break;
}
}
/* FIXME: add other output device res */

View file

@ -320,6 +320,8 @@ static struct disp_hdmi_mode hdmi_mode_tbl[] = {
{DISP_TV_MOD_1024_768P_60HZ, HDMI1024_768, },
{DISP_TV_MOD_900_540P_60HZ, HDMI900_540, },
{DISP_TV_MOD_1920_720P_60HZ, HDMI1920_720, },
{DISP_TV_MOD_1024_600P, HDMI1024_600, },
{DISP_TV_MOD_1280_800P, HDMI1280_800, },
};
u32 hdmi_get_vic(u32 mode)

View file

@ -51,6 +51,8 @@ struct disp_video_timings video_timing[] =
{HDMI1024_768, 0, 65000000, 0, 1024, 768, 1344, 160, 24, 136, 806, 29, 3, 6, 1, 1, 0, 0, 0},
{HDMI900_540, 0, 74250000, 0, 900, 540, 1650, 400, 300, 50, 750, 120, 80, 10, 1, 1, 0, 0, 0},
{HDMI1920_720, 0, 94500000, 0, 1920, 720, 1984, 26, 26, 12, 792, 46, 14, 12, 0, 0, 0, 0, 0},
{HDMI1024_600, 0, 45000000, 0, 1024, 600, 1200, 96, 48, 32, 625, 16, 3, 6, 0, 0, 0, 0, 0},
{HDMI1280_800, 0, 69300000, 0, 1280, 800, 1353, 9, 16, 48, 854, 50, 1, 3, 0, 0, 0, 0, 0},
};
static void hdmi_para_reset(void)

View file

@ -30,7 +30,9 @@
#define HDMI1280_1024 (1+0x110)
#define HDMI1024_768 (2+0x110)
#define HDMI900_540 (3+0x110)
#define HDMI1920_720 (4 + 0x110)
#define HDMI1920_720 (4+0x110)
#define HDMI1024_600 (5+0x110)
#define HDMI1280_800 (6+0x110)
#define HDMI_State_Idle 0x00
#define HDMI_State_Wait_Hpd 0x02

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@ -147,6 +147,12 @@ static s32 edid_parse_dtd_block(u8 *pbuf)
if ((sizex== 1920) && (sizey == 1080)) {
Device_Support_VIC[HDMI1080P_60] = 1;
}
if ((sizex== 1024) && (sizey == 600)) {
Device_Support_VIC[HDMI1024_600] = 1;
}
if ((sizex== 1280) && (sizey == 800)) {
Device_Support_VIC[HDMI1280_800] = 1;
}
}
else if ((frame_rate == 49) || (frame_rate == 50)) {
if ((sizex== 720) && (sizey == 288)) {
@ -164,6 +170,12 @@ static s32 edid_parse_dtd_block(u8 *pbuf)
if ((sizex== 1920) && (sizey == 1080)) {
Device_Support_VIC[HDMI1080P_50] = 1;
}
if ((sizex== 1024) && (sizey == 600)) {
Device_Support_VIC[HDMI1024_600] = 1;
}
if ((sizex== 1280) && (sizey == 800)) {
Device_Support_VIC[HDMI1280_800] = 1;
}
}
else if ((frame_rate == 23) || (frame_rate == 24)) {
if ((sizex== 1920) && (sizey == 1080)) {

View file

@ -216,6 +216,8 @@ enum disp_tv_mode
DISP_TV_MOD_1024_768P_60HZ = 0x42,
DISP_TV_MOD_900_540P_60HZ = 0x43,
DISP_TV_MOD_1920_720P_60HZ = 0x44,
DISP_TV_MOD_1024_600P = 0x45,
DISP_TV_MOD_1280_800P = 0x46,
/*
* vga
* NOTE:macro'value of new solution must between

View file

@ -989,11 +989,19 @@ s32 bsp_disp_get_screen_width_from_output_type(u32 disp, u32 output_type,
width = 720;
height = 576;
break;
case DISP_TV_MOD_1024_600P:
width = 1024;
height = 600;
break;
case DISP_TV_MOD_720P_50HZ:
case DISP_TV_MOD_720P_60HZ:
width = 1280;
height = 720;
break;
case DISP_TV_MOD_1280_800P:
width = 1280;
height = 800;
break;
case DISP_TV_MOD_1080P_50HZ:
case DISP_TV_MOD_1080P_60HZ:
case DISP_TV_MOD_1080P_30HZ:
@ -1092,11 +1100,19 @@ s32 bsp_disp_get_screen_height_from_output_type(u32 disp, u32 output_type,
width = 720;
height = 576;
break;
case DISP_TV_MOD_1024_600P:
width = 1024;
height = 600;
break;
case DISP_TV_MOD_720P_50HZ:
case DISP_TV_MOD_720P_60HZ:
width = 1280;
height = 720;
break;
case DISP_TV_MOD_1280_800P:
width = 1280;
height = 800;
break;
case DISP_TV_MOD_1080P_50HZ:
case DISP_TV_MOD_1080P_60HZ:
case DISP_TV_MOD_1080P_30HZ:

View file

@ -33,6 +33,8 @@
#define HDMI3840_2160P_25 (0x02 + 0x100)
#define HDMI3840_2160P_24 (0x03 + 0x100)
#define HDMI4096_2160P_24 (0x04 + 0x100)
#define HDMI1024_600 (0x05 + 0x100)
#define HDMI1280_800 (0x06 + 0x100)
s32 disp_init_hdmi(struct disp_bsp_init_para *para);

View file

@ -358,6 +358,8 @@ static struct disp_hdmi_mode hdmi_mode_tbl[] = {
{DISP_TV_MOD_3840_2160P_25HZ, HDMI3840_2160P_25, },
{DISP_TV_MOD_3840_2160P_24HZ, HDMI3840_2160P_24, },
{DISP_TV_MOD_4096_2160P_24HZ, HDMI4096_2160P_24, },
{DISP_TV_MOD_1024_600P, HDMI1024_600, },
{DISP_TV_MOD_1280_800P, HDMI1280_800, },
};
static u32 hdmi_get_vic(u32 mode)

View file

@ -118,6 +118,27 @@ struct disp_video_timings video_timing[] = {
.vactive_space = 0,
.trd_mode = 0,
},
{
.vic = HDMI1024_600,
.tv_mode = 0,
.pixel_clk = 45000000,
.pixel_repeat = 0,
.x_res = 1024,
.y_res = 600,
.hor_total_time = 1200,
.hor_back_porch = 96,
.hor_front_porch = 48,
.hor_sync_time = 32,
.ver_total_time = 625,
.ver_back_porch = 16,
.ver_front_porch = 3,
.ver_sync_time = 6,
.hor_sync_polarity = 0,
.ver_sync_polarity = 0,
.b_interlace = 0,
.vactive_space = 0,
.trd_mode = 0,
},
{
.vic = HDMI720P_50,
.tv_mode = 0,
@ -160,6 +181,27 @@ struct disp_video_timings video_timing[] = {
.vactive_space = 0,
.trd_mode = 0,
},
{
.vic = HDMI1280_800,
.tv_mode = 0,
.pixel_clk = 69300000,
.pixel_repeat = 0,
.x_res = 1280,
.y_res = 800,
.hor_total_time = 1353,
.hor_back_porch = 9,
.hor_front_porch = 16,
.hor_sync_time = 48,
.ver_total_time = 854,
.ver_back_porch = 50,
.ver_front_porch = 1,
.ver_sync_time = 3,
.hor_sync_polarity = 0,
.ver_sync_polarity = 0,
.b_interlace = 0,
.vactive_space = 0,
.trd_mode = 0,
},
{
.vic = HDMI1080I_50,
.tv_mode = 0,

View file

@ -35,6 +35,8 @@
#define HDMI3840_2160P_25 (0x02 + 0x100)
#define HDMI3840_2160P_24 (0x03 + 0x100)
#define HDMI4096_2160P_24 (0x04 + 0x100)
#define HDMI1024_600 (0x05 + 0x100)
#define HDMI1280_800 (0x06 + 0x100)
#define HDMI_EDID_LEN 1024
#define HDMI_State_Idle 0x00

View file

@ -156,6 +156,10 @@ static s32 edid_parse_dtd_block(u8 *pbuf)
Device_Support_VIC[HDMI1080I_60] = 1;
if ((sizex == 1920) && (sizey == 1080))
Device_Support_VIC[HDMI1080P_60] = 1;
if ((sizex == 1024) && (sizey == 600))
Device_Support_VIC[HDMI1024_600] = 1;
if ((sizex == 1280) && (sizey == 800))
Device_Support_VIC[HDMI1280_800] = 1;
} else if ((frame_rate == 49) || (frame_rate == 50)) {
if ((sizex == 720) && (sizey == 288))
Device_Support_VIC[HDMI1440_576I] = 1;
@ -167,6 +171,10 @@ static s32 edid_parse_dtd_block(u8 *pbuf)
Device_Support_VIC[HDMI1080I_50] = 1;
if ((sizex == 1920) && (sizey == 1080))
Device_Support_VIC[HDMI1080P_50] = 1;
if ((sizex == 1024) && (sizey == 600))
Device_Support_VIC[HDMI1024_600] = 1;
if ((sizex == 1280) && (sizey == 800))
Device_Support_VIC[HDMI1280_800] = 1;
} else if ((frame_rate == 23) || (frame_rate == 24)) {
if ((sizex == 1920) && (sizey == 1080))
Device_Support_VIC[HDMI1080P_24] = 1;

View file

@ -231,6 +231,8 @@ enum disp_tv_mode {
DISP_TV_MOD_1024_768P_60HZ = 0x42,
DISP_TV_MOD_900_540P_60HZ = 0x43,
DISP_TV_MOD_1920_720P_60HZ = 0x44,
DISP_TV_MOD_1024_600P = 0x45,
DISP_TV_MOD_1280_800P = 0x46,
/* vga */
DISP_VGA_MOD_640_480P_60 = 0x50,
DISP_VGA_MOD_800_600P_60 = 0x51,