upload android base code part4
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#ifndef _UAPI_ESOC_CTRL_H_
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#define _UAPI_ESOC_CTRL_H_
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#define ESOC_CODE 0xCC
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#define ESOC_CMD_EXE _IOW(ESOC_CODE, 1, u32)
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#define ESOC_WAIT_FOR_REQ _IOR(ESOC_CODE, 2, u32)
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#define ESOC_NOTIFY _IOW(ESOC_CODE, 3, u32)
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#define ESOC_GET_STATUS _IOR(ESOC_CODE, 4, u32)
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#define ESOC_WAIT_FOR_CRASH _IOR(ESOC_CODE, 6, u32)
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#define ESOC_REG_REQ_ENG _IO(ESOC_CODE, 7)
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#define ESOC_REG_CMD_ENG _IO(ESOC_CODE, 8)
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/*Link types for communication with external SOCs*/
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#define HSIC "HSIC"
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#define HSICPCIe "HSIC+PCIe"
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#define PCIe "PCIe"
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enum esoc_evt {
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ESOC_RUN_STATE = 0x1,
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ESOC_UNEXPECTED_RESET,
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ESOC_ERR_FATAL,
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ESOC_IN_DEBUG,
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ESOC_REQ_ENG_ON,
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ESOC_REQ_ENG_OFF,
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ESOC_CMD_ENG_ON,
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ESOC_CMD_ENG_OFF,
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ESOC_INVALID_STATE,
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};
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enum esoc_cmd {
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ESOC_PWR_ON = 1,
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ESOC_PWR_OFF,
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ESOC_FORCE_PWR_OFF,
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ESOC_RESET,
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ESOC_PREPARE_DEBUG,
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ESOC_EXE_DEBUG,
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ESOC_EXIT_DEBUG,
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};
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enum esoc_notify {
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ESOC_IMG_XFER_DONE = 1,
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ESOC_BOOT_DONE,
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ESOC_BOOT_FAIL,
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ESOC_IMG_XFER_RETRY,
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ESOC_IMG_XFER_FAIL,
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ESOC_UPGRADE_AVAILABLE,
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ESOC_DEBUG_DONE,
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ESOC_DEBUG_FAIL,
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ESOC_PRIMARY_CRASH,
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ESOC_PRIMARY_REBOOT,
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};
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enum esoc_req {
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ESOC_REQ_IMG = 1,
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ESOC_REQ_DEBUG,
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ESOC_REQ_SHUTDOWN,
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};
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#ifdef __KERNEL__
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/**
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* struct esoc_handle: Handle for clients of esoc
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* @name: name of the external soc.
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* @link: link of external soc.
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* @id: id of external soc.
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*/
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struct esoc_handle {
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const char *name;
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const char *link;
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unsigned int id;
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};
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#endif
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#endif
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/*
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This file defines the kernel interface of FUSE
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Copyright (C) 2001-2008 Miklos Szeredi <miklos@szeredi.hu>
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This program can be distributed under the terms of the GNU GPL.
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See the file COPYING.
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This -- and only this -- header file may also be distributed under
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the terms of the BSD Licence as follows:
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Copyright (C) 2001-2007 Miklos Szeredi. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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SUCH DAMAGE.
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*/
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/*
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* This file defines the kernel interface of FUSE
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*
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* Protocol changelog:
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*
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* 7.9:
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* - new fuse_getattr_in input argument of GETATTR
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* - add lk_flags in fuse_lk_in
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* - add lock_owner field to fuse_setattr_in, fuse_read_in and fuse_write_in
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* - add blksize field to fuse_attr
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* - add file flags field to fuse_read_in and fuse_write_in
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*
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* 7.10
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* - add nonseekable open flag
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*
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* 7.11
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* - add IOCTL message
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* - add unsolicited notification support
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* - add POLL message and NOTIFY_POLL notification
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*
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* 7.12
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* - add umask flag to input argument of open, mknod and mkdir
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* - add notification messages for invalidation of inodes and
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* directory entries
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*
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* 7.13
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* - make max number of background requests and congestion threshold
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* tunables
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*
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* 7.14
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* - add splice support to fuse device
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*
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* 7.15
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* - add store notify
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* - add retrieve notify
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*
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* 7.16
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* - add BATCH_FORGET request
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* - FUSE_IOCTL_UNRESTRICTED shall now return with array of 'struct
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* fuse_ioctl_iovec' instead of ambiguous 'struct iovec'
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* - add FUSE_IOCTL_32BIT flag
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*
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* 7.17
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* - add FUSE_FLOCK_LOCKS and FUSE_RELEASE_FLOCK_UNLOCK
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*
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* 7.18
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* - add FUSE_IOCTL_DIR flag
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* - add FUSE_NOTIFY_DELETE
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*
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* 7.19
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* - add FUSE_FALLOCATE
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*
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* 7.20
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* - add FUSE_AUTO_INVAL_DATA
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*
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* 7.21
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* - add FUSE_READDIRPLUS
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* - send the requested events in POLL request
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*
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* 7.22
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* - add FUSE_ASYNC_DIO
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*
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* 7.23
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* - add FUSE_WRITEBACK_CACHE
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*/
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#ifndef _LINUX_FUSE_H
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#define _LINUX_FUSE_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#else
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#include <stdint.h>
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#endif
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/*
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* Version negotiation:
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*
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* Both the kernel and userspace send the version they support in the
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* INIT request and reply respectively.
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*
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* If the major versions match then both shall use the smallest
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* of the two minor versions for communication.
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*
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* If the kernel supports a larger major version, then userspace shall
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* reply with the major version it supports, ignore the rest of the
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* INIT message and expect a new INIT message from the kernel with a
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* matching major version.
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*
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* If the library supports a larger major version, then it shall fall
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* back to the major protocol version sent by the kernel for
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* communication and reply with that major version (and an arbitrary
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* supported minor version).
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*/
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/** Version number of this interface */
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#define FUSE_KERNEL_VERSION 7
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/** Minor version number of this interface */
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#define FUSE_KERNEL_MINOR_VERSION 23
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/** The node ID of the root inode */
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#define FUSE_ROOT_ID 1
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/* Make sure all structures are padded to 64bit boundary, so 32bit
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userspace works under 64bit kernels */
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struct fuse_attr {
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uint64_t ino;
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uint64_t size;
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uint64_t blocks;
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uint64_t atime;
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uint64_t mtime;
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uint64_t ctime;
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uint32_t atimensec;
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uint32_t mtimensec;
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uint32_t ctimensec;
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uint32_t mode;
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uint32_t nlink;
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uint32_t uid;
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uint32_t gid;
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uint32_t rdev;
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uint32_t blksize;
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uint32_t padding;
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};
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struct fuse_kstatfs {
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uint64_t blocks;
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uint64_t bfree;
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uint64_t bavail;
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uint64_t files;
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uint64_t ffree;
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uint32_t bsize;
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uint32_t namelen;
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uint32_t frsize;
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uint32_t padding;
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uint32_t spare[6];
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};
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struct fuse_file_lock {
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uint64_t start;
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uint64_t end;
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uint32_t type;
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uint32_t pid; /* tgid */
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};
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/**
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* Bitmasks for fuse_setattr_in.valid
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*/
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#define FATTR_MODE (1 << 0)
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#define FATTR_UID (1 << 1)
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#define FATTR_GID (1 << 2)
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#define FATTR_SIZE (1 << 3)
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#define FATTR_ATIME (1 << 4)
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#define FATTR_MTIME (1 << 5)
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#define FATTR_FH (1 << 6)
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#define FATTR_ATIME_NOW (1 << 7)
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#define FATTR_MTIME_NOW (1 << 8)
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#define FATTR_LOCKOWNER (1 << 9)
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/**
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* Flags returned by the OPEN request
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*
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* FOPEN_DIRECT_IO: bypass page cache for this open file
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* FOPEN_KEEP_CACHE: don't invalidate the data cache on open
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* FOPEN_NONSEEKABLE: the file is not seekable
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*/
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#define FOPEN_DIRECT_IO (1 << 0)
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#define FOPEN_KEEP_CACHE (1 << 1)
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#define FOPEN_NONSEEKABLE (1 << 2)
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/**
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* INIT request/reply flags
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*
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* FUSE_ASYNC_READ: asynchronous read requests
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* FUSE_POSIX_LOCKS: remote locking for POSIX file locks
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* FUSE_FILE_OPS: kernel sends file handle for fstat, etc... (not yet supported)
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* FUSE_ATOMIC_O_TRUNC: handles the O_TRUNC open flag in the filesystem
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* FUSE_EXPORT_SUPPORT: filesystem handles lookups of "." and ".."
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* FUSE_BIG_WRITES: filesystem can handle write size larger than 4kB
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* FUSE_DONT_MASK: don't apply umask to file mode on create operations
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* FUSE_SPLICE_WRITE: kernel supports splice write on the device
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* FUSE_SPLICE_MOVE: kernel supports splice move on the device
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* FUSE_SPLICE_READ: kernel supports splice read on the device
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* FUSE_FLOCK_LOCKS: remote locking for BSD style file locks
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* FUSE_HAS_IOCTL_DIR: kernel supports ioctl on directories
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* FUSE_AUTO_INVAL_DATA: automatically invalidate cached pages
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* FUSE_DO_READDIRPLUS: do READDIRPLUS (READDIR+LOOKUP in one)
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* FUSE_READDIRPLUS_AUTO: adaptive readdirplus
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* FUSE_ASYNC_DIO: asynchronous direct I/O submission
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* FUSE_WRITEBACK_CACHE: use writeback cache for buffered writes
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*/
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#define FUSE_ASYNC_READ (1 << 0)
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#define FUSE_POSIX_LOCKS (1 << 1)
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#define FUSE_FILE_OPS (1 << 2)
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#define FUSE_ATOMIC_O_TRUNC (1 << 3)
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#define FUSE_EXPORT_SUPPORT (1 << 4)
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#define FUSE_BIG_WRITES (1 << 5)
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#define FUSE_DONT_MASK (1 << 6)
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#define FUSE_SPLICE_WRITE (1 << 7)
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#define FUSE_SPLICE_MOVE (1 << 8)
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#define FUSE_SPLICE_READ (1 << 9)
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#define FUSE_FLOCK_LOCKS (1 << 10)
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#define FUSE_HAS_IOCTL_DIR (1 << 11)
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#define FUSE_AUTO_INVAL_DATA (1 << 12)
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#define FUSE_DO_READDIRPLUS (1 << 13)
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#define FUSE_READDIRPLUS_AUTO (1 << 14)
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#define FUSE_ASYNC_DIO (1 << 15)
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#define FUSE_WRITEBACK_CACHE (1 << 16)
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/**
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* CUSE INIT request/reply flags
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*
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* CUSE_UNRESTRICTED_IOCTL: use unrestricted ioctl
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*/
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#define CUSE_UNRESTRICTED_IOCTL (1 << 0)
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/**
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* Release flags
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*/
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#define FUSE_RELEASE_FLUSH (1 << 0)
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#define FUSE_RELEASE_FLOCK_UNLOCK (1 << 1)
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/**
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* Getattr flags
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*/
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#define FUSE_GETATTR_FH (1 << 0)
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/**
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* Lock flags
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*/
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#define FUSE_LK_FLOCK (1 << 0)
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/**
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* WRITE flags
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*
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* FUSE_WRITE_CACHE: delayed write from page cache, file handle is guessed
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* FUSE_WRITE_LOCKOWNER: lock_owner field is valid
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*/
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#define FUSE_WRITE_CACHE (1 << 0)
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#define FUSE_WRITE_LOCKOWNER (1 << 1)
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/**
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* Read flags
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*/
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#define FUSE_READ_LOCKOWNER (1 << 1)
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/**
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* Ioctl flags
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*
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* FUSE_IOCTL_COMPAT: 32bit compat ioctl on 64bit machine
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* FUSE_IOCTL_UNRESTRICTED: not restricted to well-formed ioctls, retry allowed
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* FUSE_IOCTL_RETRY: retry with new iovecs
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* FUSE_IOCTL_32BIT: 32bit ioctl
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* FUSE_IOCTL_DIR: is a directory
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*
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* FUSE_IOCTL_MAX_IOV: maximum of in_iovecs + out_iovecs
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*/
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#define FUSE_IOCTL_COMPAT (1 << 0)
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#define FUSE_IOCTL_UNRESTRICTED (1 << 1)
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#define FUSE_IOCTL_RETRY (1 << 2)
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#define FUSE_IOCTL_32BIT (1 << 3)
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#define FUSE_IOCTL_DIR (1 << 4)
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#define FUSE_IOCTL_MAX_IOV 256
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/**
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* Poll flags
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*
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* FUSE_POLL_SCHEDULE_NOTIFY: request poll notify
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*/
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#define FUSE_POLL_SCHEDULE_NOTIFY (1 << 0)
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enum fuse_opcode {
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FUSE_LOOKUP = 1,
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FUSE_FORGET = 2, /* no reply */
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FUSE_GETATTR = 3,
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FUSE_SETATTR = 4,
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FUSE_READLINK = 5,
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FUSE_SYMLINK = 6,
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FUSE_MKNOD = 8,
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FUSE_MKDIR = 9,
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FUSE_UNLINK = 10,
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FUSE_RMDIR = 11,
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FUSE_RENAME = 12,
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FUSE_LINK = 13,
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FUSE_OPEN = 14,
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FUSE_READ = 15,
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FUSE_WRITE = 16,
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FUSE_STATFS = 17,
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FUSE_RELEASE = 18,
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FUSE_FSYNC = 20,
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FUSE_SETXATTR = 21,
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FUSE_GETXATTR = 22,
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FUSE_LISTXATTR = 23,
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FUSE_REMOVEXATTR = 24,
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FUSE_FLUSH = 25,
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FUSE_INIT = 26,
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FUSE_OPENDIR = 27,
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FUSE_READDIR = 28,
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FUSE_RELEASEDIR = 29,
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FUSE_FSYNCDIR = 30,
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FUSE_GETLK = 31,
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FUSE_SETLK = 32,
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FUSE_SETLKW = 33,
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FUSE_ACCESS = 34,
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FUSE_CREATE = 35,
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FUSE_INTERRUPT = 36,
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FUSE_BMAP = 37,
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FUSE_DESTROY = 38,
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FUSE_IOCTL = 39,
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FUSE_POLL = 40,
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FUSE_NOTIFY_REPLY = 41,
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FUSE_BATCH_FORGET = 42,
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FUSE_FALLOCATE = 43,
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FUSE_READDIRPLUS = 44,
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/* CUSE specific operations */
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CUSE_INIT = 4096,
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};
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enum fuse_notify_code {
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FUSE_NOTIFY_POLL = 1,
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FUSE_NOTIFY_INVAL_INODE = 2,
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FUSE_NOTIFY_INVAL_ENTRY = 3,
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FUSE_NOTIFY_STORE = 4,
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FUSE_NOTIFY_RETRIEVE = 5,
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FUSE_NOTIFY_DELETE = 6,
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FUSE_NOTIFY_CODE_MAX,
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};
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/* The read buffer is required to be at least 8k, but may be much larger */
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#define FUSE_MIN_READ_BUFFER 8192
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#define FUSE_COMPAT_ENTRY_OUT_SIZE 120
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struct fuse_entry_out {
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uint64_t nodeid; /* Inode ID */
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uint64_t generation; /* Inode generation: nodeid:gen must
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be unique for the fs's lifetime */
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uint64_t entry_valid; /* Cache timeout for the name */
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uint64_t attr_valid; /* Cache timeout for the attributes */
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uint32_t entry_valid_nsec;
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uint32_t attr_valid_nsec;
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struct fuse_attr attr;
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};
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struct fuse_forget_in {
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uint64_t nlookup;
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};
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struct fuse_forget_one {
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uint64_t nodeid;
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uint64_t nlookup;
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};
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struct fuse_batch_forget_in {
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uint32_t count;
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uint32_t dummy;
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};
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struct fuse_getattr_in {
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uint32_t getattr_flags;
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uint32_t dummy;
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uint64_t fh;
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};
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#define FUSE_COMPAT_ATTR_OUT_SIZE 96
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struct fuse_attr_out {
|
||||
uint64_t attr_valid; /* Cache timeout for the attributes */
|
||||
uint32_t attr_valid_nsec;
|
||||
uint32_t dummy;
|
||||
struct fuse_attr attr;
|
||||
};
|
||||
|
||||
#define FUSE_COMPAT_MKNOD_IN_SIZE 8
|
||||
|
||||
struct fuse_mknod_in {
|
||||
uint32_t mode;
|
||||
uint32_t rdev;
|
||||
uint32_t umask;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_mkdir_in {
|
||||
uint32_t mode;
|
||||
uint32_t umask;
|
||||
};
|
||||
|
||||
struct fuse_rename_in {
|
||||
uint64_t newdir;
|
||||
};
|
||||
|
||||
struct fuse_link_in {
|
||||
uint64_t oldnodeid;
|
||||
};
|
||||
|
||||
struct fuse_setattr_in {
|
||||
uint32_t valid;
|
||||
uint32_t padding;
|
||||
uint64_t fh;
|
||||
uint64_t size;
|
||||
uint64_t lock_owner;
|
||||
uint64_t atime;
|
||||
uint64_t mtime;
|
||||
uint64_t unused2;
|
||||
uint32_t atimensec;
|
||||
uint32_t mtimensec;
|
||||
uint32_t unused3;
|
||||
uint32_t mode;
|
||||
uint32_t unused4;
|
||||
uint32_t uid;
|
||||
uint32_t gid;
|
||||
uint32_t unused5;
|
||||
};
|
||||
|
||||
struct fuse_open_in {
|
||||
uint32_t flags;
|
||||
uint32_t unused;
|
||||
};
|
||||
|
||||
struct fuse_create_in {
|
||||
uint32_t flags;
|
||||
uint32_t mode;
|
||||
uint32_t umask;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_open_out {
|
||||
uint64_t fh;
|
||||
uint32_t open_flags;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_release_in {
|
||||
uint64_t fh;
|
||||
uint32_t flags;
|
||||
uint32_t release_flags;
|
||||
uint64_t lock_owner;
|
||||
};
|
||||
|
||||
struct fuse_flush_in {
|
||||
uint64_t fh;
|
||||
uint32_t unused;
|
||||
uint32_t padding;
|
||||
uint64_t lock_owner;
|
||||
};
|
||||
|
||||
struct fuse_read_in {
|
||||
uint64_t fh;
|
||||
uint64_t offset;
|
||||
uint32_t size;
|
||||
uint32_t read_flags;
|
||||
uint64_t lock_owner;
|
||||
uint32_t flags;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
#define FUSE_COMPAT_WRITE_IN_SIZE 24
|
||||
|
||||
struct fuse_write_in {
|
||||
uint64_t fh;
|
||||
uint64_t offset;
|
||||
uint32_t size;
|
||||
uint32_t write_flags;
|
||||
uint64_t lock_owner;
|
||||
uint32_t flags;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_write_out {
|
||||
uint32_t size;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
#define FUSE_COMPAT_STATFS_SIZE 48
|
||||
|
||||
struct fuse_statfs_out {
|
||||
struct fuse_kstatfs st;
|
||||
};
|
||||
|
||||
struct fuse_fsync_in {
|
||||
uint64_t fh;
|
||||
uint32_t fsync_flags;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_setxattr_in {
|
||||
uint32_t size;
|
||||
uint32_t flags;
|
||||
};
|
||||
|
||||
struct fuse_getxattr_in {
|
||||
uint32_t size;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_getxattr_out {
|
||||
uint32_t size;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_lk_in {
|
||||
uint64_t fh;
|
||||
uint64_t owner;
|
||||
struct fuse_file_lock lk;
|
||||
uint32_t lk_flags;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_lk_out {
|
||||
struct fuse_file_lock lk;
|
||||
};
|
||||
|
||||
struct fuse_access_in {
|
||||
uint32_t mask;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_init_in {
|
||||
uint32_t major;
|
||||
uint32_t minor;
|
||||
uint32_t max_readahead;
|
||||
uint32_t flags;
|
||||
};
|
||||
|
||||
struct fuse_init_out {
|
||||
uint32_t major;
|
||||
uint32_t minor;
|
||||
uint32_t max_readahead;
|
||||
uint32_t flags;
|
||||
uint16_t max_background;
|
||||
uint16_t congestion_threshold;
|
||||
uint32_t max_write;
|
||||
};
|
||||
|
||||
#define CUSE_INIT_INFO_MAX 4096
|
||||
|
||||
struct cuse_init_in {
|
||||
uint32_t major;
|
||||
uint32_t minor;
|
||||
uint32_t unused;
|
||||
uint32_t flags;
|
||||
};
|
||||
|
||||
struct cuse_init_out {
|
||||
uint32_t major;
|
||||
uint32_t minor;
|
||||
uint32_t unused;
|
||||
uint32_t flags;
|
||||
uint32_t max_read;
|
||||
uint32_t max_write;
|
||||
uint32_t dev_major; /* chardev major */
|
||||
uint32_t dev_minor; /* chardev minor */
|
||||
uint32_t spare[10];
|
||||
};
|
||||
|
||||
struct fuse_interrupt_in {
|
||||
uint64_t unique;
|
||||
};
|
||||
|
||||
struct fuse_bmap_in {
|
||||
uint64_t block;
|
||||
uint32_t blocksize;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_bmap_out {
|
||||
uint64_t block;
|
||||
};
|
||||
|
||||
struct fuse_ioctl_in {
|
||||
uint64_t fh;
|
||||
uint32_t flags;
|
||||
uint32_t cmd;
|
||||
uint64_t arg;
|
||||
uint32_t in_size;
|
||||
uint32_t out_size;
|
||||
};
|
||||
|
||||
struct fuse_ioctl_iovec {
|
||||
uint64_t base;
|
||||
uint64_t len;
|
||||
};
|
||||
|
||||
struct fuse_ioctl_out {
|
||||
int32_t result;
|
||||
uint32_t flags;
|
||||
uint32_t in_iovs;
|
||||
uint32_t out_iovs;
|
||||
};
|
||||
|
||||
struct fuse_poll_in {
|
||||
uint64_t fh;
|
||||
uint64_t kh;
|
||||
uint32_t flags;
|
||||
uint32_t events;
|
||||
};
|
||||
|
||||
struct fuse_poll_out {
|
||||
uint32_t revents;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_notify_poll_wakeup_out {
|
||||
uint64_t kh;
|
||||
};
|
||||
|
||||
struct fuse_fallocate_in {
|
||||
uint64_t fh;
|
||||
uint64_t offset;
|
||||
uint64_t length;
|
||||
uint32_t mode;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_in_header {
|
||||
uint32_t len;
|
||||
uint32_t opcode;
|
||||
uint64_t unique;
|
||||
uint64_t nodeid;
|
||||
uint32_t uid;
|
||||
uint32_t gid;
|
||||
uint32_t pid;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_out_header {
|
||||
uint32_t len;
|
||||
int32_t error;
|
||||
uint64_t unique;
|
||||
};
|
||||
|
||||
struct fuse_dirent {
|
||||
uint64_t ino;
|
||||
uint64_t off;
|
||||
uint32_t namelen;
|
||||
uint32_t type;
|
||||
char name[];
|
||||
};
|
||||
|
||||
#define FUSE_NAME_OFFSET offsetof(struct fuse_dirent, name)
|
||||
#define FUSE_DIRENT_ALIGN(x) \
|
||||
(((x) + sizeof(uint64_t) - 1) & ~(sizeof(uint64_t) - 1))
|
||||
#define FUSE_DIRENT_SIZE(d) \
|
||||
FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET + (d)->namelen)
|
||||
|
||||
struct fuse_direntplus {
|
||||
struct fuse_entry_out entry_out;
|
||||
struct fuse_dirent dirent;
|
||||
};
|
||||
|
||||
#define FUSE_NAME_OFFSET_DIRENTPLUS \
|
||||
offsetof(struct fuse_direntplus, dirent.name)
|
||||
#define FUSE_DIRENTPLUS_SIZE(d) \
|
||||
FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET_DIRENTPLUS + (d)->dirent.namelen)
|
||||
|
||||
struct fuse_notify_inval_inode_out {
|
||||
uint64_t ino;
|
||||
int64_t off;
|
||||
int64_t len;
|
||||
};
|
||||
|
||||
struct fuse_notify_inval_entry_out {
|
||||
uint64_t parent;
|
||||
uint32_t namelen;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_notify_delete_out {
|
||||
uint64_t parent;
|
||||
uint64_t child;
|
||||
uint32_t namelen;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_notify_store_out {
|
||||
uint64_t nodeid;
|
||||
uint64_t offset;
|
||||
uint32_t size;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
struct fuse_notify_retrieve_out {
|
||||
uint64_t notify_unique;
|
||||
uint64_t nodeid;
|
||||
uint64_t offset;
|
||||
uint32_t size;
|
||||
uint32_t padding;
|
||||
};
|
||||
|
||||
/* Matches the size of fuse_write_in */
|
||||
struct fuse_notify_retrieve_in {
|
||||
uint64_t dummy1;
|
||||
uint64_t offset;
|
||||
uint32_t size;
|
||||
uint32_t dummy2;
|
||||
uint64_t dummy3;
|
||||
uint64_t dummy4;
|
||||
};
|
||||
|
||||
#endif /* _LINUX_FUSE_H */
|
||||
|
|
@ -0,0 +1,146 @@
|
|||
#ifndef __UAPI_MFD_MSM_ADIE_CODEC_H
|
||||
#define __UAPI_MFD_MSM_ADIE_CODEC_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
/* Value Represents a entry */
|
||||
#define ADIE_CODEC_ACTION_ENTRY 0x1
|
||||
/* Value representing a delay wait */
|
||||
#define ADIE_CODEC_ACTION_DELAY_WAIT 0x2
|
||||
/* Value representing a stage reached */
|
||||
#define ADIE_CODEC_ACTION_STAGE_REACHED 0x3
|
||||
|
||||
/* This value is the state after the client sets the path */
|
||||
#define ADIE_CODEC_PATH_OFF 0x0050
|
||||
|
||||
/* State to which client asks the drv to proceed to where it can
|
||||
* set up the clocks and 0-fill PCM buffers
|
||||
*/
|
||||
#define ADIE_CODEC_DIGITAL_READY 0x0100
|
||||
|
||||
/* State to which client asks the drv to proceed to where it can
|
||||
* start sending data after internal steady state delay
|
||||
*/
|
||||
#define ADIE_CODEC_DIGITAL_ANALOG_READY 0x1000
|
||||
|
||||
|
||||
/* Client Asks adie to switch off the Analog portion of the
|
||||
* the internal codec. After the use of this path
|
||||
*/
|
||||
#define ADIE_CODEC_ANALOG_OFF 0x0750
|
||||
|
||||
|
||||
/* Client Asks adie to switch off the digital portion of the
|
||||
* the internal codec. After switching off the analog portion.
|
||||
*
|
||||
* 0-fill PCM may or maynot be sent at this point
|
||||
*
|
||||
*/
|
||||
#define ADIE_CODEC_DIGITAL_OFF 0x0600
|
||||
|
||||
/* State to which client asks the drv to write the default values
|
||||
* to the registers */
|
||||
#define ADIE_CODEC_FLASH_IMAGE 0x0001
|
||||
|
||||
/* Path type */
|
||||
#define ADIE_CODEC_RX 0
|
||||
#define ADIE_CODEC_TX 1
|
||||
#define ADIE_CODEC_LB 3
|
||||
#define ADIE_CODEC_MAX 4
|
||||
|
||||
#define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
|
||||
|
||||
#define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
|
||||
do { \
|
||||
((reg) = ((packed >> 16) & (0xff))); \
|
||||
((mask) = ((packed >> 8) & (0xff))); \
|
||||
((val) = ((packed) & (0xff))); \
|
||||
} while (0);
|
||||
|
||||
struct adie_codec_action_unit {
|
||||
u32 type;
|
||||
u32 action;
|
||||
};
|
||||
|
||||
struct adie_codec_hwsetting_entry{
|
||||
struct adie_codec_action_unit *actions;
|
||||
u32 action_sz;
|
||||
u32 freq_plan;
|
||||
u32 osr;
|
||||
/* u32 VolMask;
|
||||
* u32 SidetoneMask;
|
||||
*/
|
||||
};
|
||||
|
||||
struct adie_codec_dev_profile {
|
||||
u32 path_type; /* RX or TX */
|
||||
u32 setting_sz;
|
||||
struct adie_codec_hwsetting_entry *settings;
|
||||
};
|
||||
|
||||
struct adie_codec_register {
|
||||
u8 reg;
|
||||
u8 mask;
|
||||
u8 val;
|
||||
};
|
||||
|
||||
struct adie_codec_register_image {
|
||||
struct adie_codec_register *regs;
|
||||
u32 img_sz;
|
||||
};
|
||||
|
||||
struct adie_codec_path;
|
||||
|
||||
struct adie_codec_anc_data {
|
||||
u32 size;
|
||||
u32 writes[];
|
||||
};
|
||||
|
||||
struct adie_codec_operations {
|
||||
int codec_id;
|
||||
int (*codec_open) (struct adie_codec_dev_profile *profile,
|
||||
struct adie_codec_path **path_pptr);
|
||||
int (*codec_close) (struct adie_codec_path *path_ptr);
|
||||
int (*codec_setpath) (struct adie_codec_path *path_ptr,
|
||||
u32 freq_plan, u32 osr);
|
||||
int (*codec_proceed_stage) (struct adie_codec_path *path_ptr,
|
||||
u32 state);
|
||||
u32 (*codec_freq_supported) (struct adie_codec_dev_profile *profile,
|
||||
u32 requested_freq);
|
||||
int (*codec_enable_sidetone) (struct adie_codec_path *rx_path_ptr,
|
||||
u32 enable);
|
||||
int (*codec_enable_anc) (struct adie_codec_path *rx_path_ptr,
|
||||
u32 enable, struct adie_codec_anc_data *calibration_writes);
|
||||
int (*codec_set_device_digital_volume) (
|
||||
struct adie_codec_path *path_ptr,
|
||||
u32 num_channels,
|
||||
u32 vol_percentage);
|
||||
|
||||
int (*codec_set_device_analog_volume) (struct adie_codec_path *path_ptr,
|
||||
u32 num_channels,
|
||||
u32 volume);
|
||||
int (*codec_set_master_mode) (struct adie_codec_path *path_ptr,
|
||||
u8 master);
|
||||
};
|
||||
|
||||
int adie_codec_register_codec_operations(
|
||||
const struct adie_codec_operations *codec_ops);
|
||||
int adie_codec_open(struct adie_codec_dev_profile *profile,
|
||||
struct adie_codec_path **path_pptr);
|
||||
int adie_codec_setpath(struct adie_codec_path *path_ptr,
|
||||
u32 freq_plan, u32 osr);
|
||||
int adie_codec_proceed_stage(struct adie_codec_path *path_ptr, u32 state);
|
||||
int adie_codec_close(struct adie_codec_path *path_ptr);
|
||||
u32 adie_codec_freq_supported(struct adie_codec_dev_profile *profile,
|
||||
u32 requested_freq);
|
||||
int adie_codec_enable_sidetone(struct adie_codec_path *rx_path_ptr, u32 enable);
|
||||
int adie_codec_enable_anc(struct adie_codec_path *rx_path_ptr, u32 enable,
|
||||
struct adie_codec_anc_data *calibration_writes);
|
||||
int adie_codec_set_device_digital_volume(struct adie_codec_path *path_ptr,
|
||||
u32 num_channels, u32 vol_percentage /* in percentage */);
|
||||
|
||||
int adie_codec_set_device_analog_volume(struct adie_codec_path *path_ptr,
|
||||
u32 num_channels, u32 volume /* in percentage */);
|
||||
|
||||
int adie_codec_set_master_mode(struct adie_codec_path *path_ptr, u8 master);
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,322 @@
|
|||
#ifndef WCD9XXX_CODEC_DIGITAL_H
|
||||
|
||||
#define WCD9XXX_CODEC_DIGITAL_H
|
||||
|
||||
#define WCD9XXX_A_CHIP_CTL (0x00)
|
||||
#define WCD9XXX_A_CHIP_CTL__POR (0x00000000)
|
||||
#define WCD9XXX_A_CHIP_STATUS (0x01)
|
||||
#define WCD9XXX_A_CHIP_STATUS__POR (0x00000000)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_0 (0x04)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_0__POR (0x00000000)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_1 (0x05)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_1__POR (0x00000000)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_2 (0x06)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_2__POR (0x00000000)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_3 (0x07)
|
||||
#define WCD9XXX_A_CHIP_ID_BYTE_3__POR (0x00000001)
|
||||
#define WCD9XXX_A_CHIP_VERSION (0x08)
|
||||
#define WCD9XXX_A_CHIP_VERSION__POR (0x00000020)
|
||||
#define WCD9XXX_A_SB_VERSION (0x09)
|
||||
#define WCD9XXX_A_SB_VERSION__POR (0x00000010)
|
||||
#define WCD9XXX_A_SLAVE_ID_1 (0x0C)
|
||||
#define WCD9XXX_A_SLAVE_ID_1__POR (0x00000077)
|
||||
#define WCD9XXX_A_SLAVE_ID_2 (0x0D)
|
||||
#define WCD9XXX_A_SLAVE_ID_2__POR (0x00000066)
|
||||
#define WCD9XXX_A_SLAVE_ID_3 (0x0E)
|
||||
#define WCD9XXX_A_SLAVE_ID_3__POR (0x00000055)
|
||||
#define WCD9XXX_A_CDC_CTL (0x80)
|
||||
#define WCD9XXX_A_CDC_CTL__POR (0x00000000)
|
||||
#define WCD9XXX_A_LEAKAGE_CTL (0x88)
|
||||
#define WCD9XXX_A_LEAKAGE_CTL__POR (0x00000004)
|
||||
#define WCD9XXX_A_INTR_MODE (0x90)
|
||||
#define WCD9XXX_A_INTR_MASK0 (0x94)
|
||||
#define WCD9XXX_A_INTR_STATUS0 (0x98)
|
||||
#define WCD9XXX_A_INTR_CLEAR0 (0x9C)
|
||||
#define WCD9XXX_A_INTR_LEVEL0 (0xA0)
|
||||
#define WCD9XXX_A_INTR_LEVEL1 (0xA1)
|
||||
#define WCD9XXX_A_INTR_LEVEL2 (0xA2)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_EN (0x1AB)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_EN__POR (0x80)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_EN (0x1AB)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_EN__POR (0x80)
|
||||
#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL (0x101)
|
||||
#define WCD9XXX_A_BIAS_CENTRAL_BG_CTL__POR (0x50)
|
||||
#define WCD9XXX_A_CLK_BUFF_EN1 (0x108)
|
||||
#define WCD9XXX_A_CLK_BUFF_EN1__POR (0x04)
|
||||
#define WCD9XXX_A_CLK_BUFF_EN2 (0x109)
|
||||
#define WCD9XXX_A_CLK_BUFF_EN2__POR (0x02)
|
||||
#define WCD9XXX_A_RX_COM_BIAS (0x1A2)
|
||||
#define WCD9XXX_A_RX_COM_BIAS__POR (0x00)
|
||||
#define WCD9XXX_A_RC_OSC_FREQ (0x1FA)
|
||||
#define WCD9XXX_A_RC_OSC_FREQ__POR (0x46)
|
||||
#define WCD9XXX_A_BIAS_OSC_BG_CTL (0x105)
|
||||
#define WCD9XXX_A_BIAS_OSC_BG_CTL__POR (0x16)
|
||||
#define WCD9XXX_A_RC_OSC_TEST (0x1FB)
|
||||
#define WCD9XXX_A_RC_OSC_TEST__POR (0x0A)
|
||||
#define WCD9XXX_A_CDC_CLK_MCLK_CTL (0x311)
|
||||
#define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR (0x00)
|
||||
|
||||
#define WCD9XXX_A_CDC_MBHC_EN_CTL (0x3C0)
|
||||
#define WCD9XXX_A_CDC_MBHC_EN_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG (0x3C1)
|
||||
#define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG (0x3C2)
|
||||
#define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG__POR (0x06)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL (0x3C3)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL__POR (0x03)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL (0x3C4)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL__POR (0x09)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL (0x3C5)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL__POR (0x1E)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL (0x3C6)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL__POR (0x45)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL (0x3C7)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL__POR (0x04)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL (0x3C8)
|
||||
#define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL__POR (0x78)
|
||||
#define WCD9XXX_A_CDC_MBHC_B1_STATUS (0x3C9)
|
||||
#define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_B2_STATUS (0x3CA)
|
||||
#define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_B3_STATUS (0x3CB)
|
||||
#define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_B4_STATUS (0x3CC)
|
||||
#define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_B5_STATUS (0x3CD)
|
||||
#define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_B1_CTL (0x3CE)
|
||||
#define WCD9XXX_A_CDC_MBHC_B1_CTL__POR (0xC0)
|
||||
#define WCD9XXX_A_CDC_MBHC_B2_CTL (0x3CF)
|
||||
#define WCD9XXX_A_CDC_MBHC_B2_CTL__POR (0x5D)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL (0x3D0)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL (0x3D1)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL (0x3D2)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL (0x3D3)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL (0x3D4)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL (0x3D5)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL (0x3D6)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL__POR (0xFF)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL (0x3D7)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL__POR (0x07)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL (0x3D8)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL__POR (0xFF)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL (0x3D9)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL__POR (0x7F)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL (0x3DA)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL (0x3DB)
|
||||
#define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL__POR (0x80)
|
||||
#define WCD9XXX_A_CDC_MBHC_CLK_CTL (0x3DC)
|
||||
#define WCD9XXX_A_CDC_MBHC_CLK_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_INT_CTL (0x3DD)
|
||||
#define WCD9XXX_A_CDC_MBHC_INT_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL (0x3DE)
|
||||
#define WCD9XXX_A_CDC_MBHC_DEBUG_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_MBHC_SPARE (0x3DF)
|
||||
#define WCD9XXX_A_CDC_MBHC_SPARE__POR (0x00)
|
||||
#define WCD9XXX_A_MBHC_SCALING_MUX_1 (0x14E)
|
||||
#define WCD9XXX_A_MBHC_SCALING_MUX_1__POR (0x00)
|
||||
#define WCD9XXX_A_RX_HPH_OCP_CTL (0x1AA)
|
||||
#define WCD9XXX_A_RX_HPH_OCP_CTL__POR (0x68)
|
||||
#define WCD9XXX_A_MICB_1_CTL (0x12B)
|
||||
#define WCD9XXX_A_MICB_1_CTL__POR (0x16)
|
||||
#define WCD9XXX_A_MICB_1_INT_RBIAS (0x12C)
|
||||
#define WCD9XXX_A_MICB_1_INT_RBIAS__POR (0x24)
|
||||
#define WCD9XXX_A_MICB_1_MBHC (0x12D)
|
||||
#define WCD9XXX_A_MICB_1_MBHC__POR (0x01)
|
||||
#define WCD9XXX_A_MICB_CFILT_2_CTL (0x12E)
|
||||
#define WCD9XXX_A_MICB_CFILT_2_CTL__POR (0x40)
|
||||
#define WCD9XXX_A_MICB_CFILT_2_VAL (0x12F)
|
||||
#define WCD9XXX_A_MICB_CFILT_2_VAL__POR (0x80)
|
||||
#define WCD9XXX_A_MICB_CFILT_2_PRECHRG (0x130)
|
||||
#define WCD9XXX_A_MICB_CFILT_2_PRECHRG__POR (0x38)
|
||||
#define WCD9XXX_A_MICB_2_CTL (0x131)
|
||||
#define WCD9XXX_A_MICB_2_CTL__POR (0x16)
|
||||
#define WCD9XXX_A_MICB_2_INT_RBIAS (0x132)
|
||||
#define WCD9XXX_A_MICB_2_INT_RBIAS__POR (0x24)
|
||||
#define WCD9XXX_A_MICB_2_MBHC (0x133)
|
||||
#define WCD9XXX_A_MICB_2_MBHC__POR (0x02)
|
||||
#define WCD9XXX_A_MICB_CFILT_3_CTL (0x134)
|
||||
#define WCD9XXX_A_MICB_CFILT_3_CTL__POR (0x40)
|
||||
#define WCD9XXX_A_MICB_CFILT_3_VAL (0x135)
|
||||
#define WCD9XXX_A_MICB_CFILT_3_VAL__POR (0x80)
|
||||
#define WCD9XXX_A_MICB_CFILT_3_PRECHRG (0x136)
|
||||
#define WCD9XXX_A_MICB_CFILT_3_PRECHRG__POR (0x38)
|
||||
#define WCD9XXX_A_MICB_3_CTL (0x137)
|
||||
#define WCD9XXX_A_MICB_3_CTL__POR (0x16)
|
||||
#define WCD9XXX_A_MICB_3_INT_RBIAS (0x138)
|
||||
#define WCD9XXX_A_MICB_3_INT_RBIAS__POR (0x24)
|
||||
#define WCD9XXX_A_MICB_3_MBHC (0x139)
|
||||
#define WCD9XXX_A_MICB_3_MBHC__POR (0x00)
|
||||
#define WCD9XXX_A_MICB_4_CTL (0x13D)
|
||||
#define WCD9XXX_A_MICB_4_CTL__POR (0x16)
|
||||
#define WCD9XXX_A_MICB_4_INT_RBIAS (0x13E)
|
||||
#define WCD9XXX_A_MICB_4_INT_RBIAS__POR (0x24)
|
||||
#define WCD9XXX_A_MICB_4_MBHC (0x13F)
|
||||
#define WCD9XXX_A_MICB_4_MBHC__POR (0x01)
|
||||
#define WCD9XXX_A_MICB_CFILT_1_VAL (0x129)
|
||||
#define WCD9XXX_A_MICB_CFILT_1_VAL__POR (0x80)
|
||||
#define WCD9XXX_A_RX_HPH_L_STATUS (0x1B3)
|
||||
#define WCD9XXX_A_RX_HPH_L_STATUS__POR (0x00)
|
||||
#define WCD9XXX_A_MBHC_HPH (0x1FE)
|
||||
#define WCD9XXX_A_MBHC_HPH__POR (0x44)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_WG_TIME (0x1AD)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_WG_TIME__POR (0x2A)
|
||||
#define WCD9XXX_A_RX_HPH_R_DAC_CTL (0x1B7)
|
||||
#define WCD9XXX_A_RX_HPH_R_DAC_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_RX_HPH_L_DAC_CTL (0x1B1)
|
||||
#define WCD9XXX_A_RX_HPH_L_DAC_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_TX_7_MBHC_EN (0x171)
|
||||
#define WCD9XXX_A_TX_7_MBHC_EN__POR (0x0C)
|
||||
#define WCD9XXX_A_PIN_CTL_OE0 (0x010)
|
||||
#define WCD9XXX_A_PIN_CTL_OE0__POR (0x00)
|
||||
#define WCD9XXX_A_PIN_CTL_OE1 (0x011)
|
||||
#define WCD9XXX_A_PIN_CTL_OE1__POR (0x00)
|
||||
#define WCD9XXX_A_MICB_CFILT_1_CTL (0x128)
|
||||
#define WCD9XXX_A_LDO_H_MODE_1 (0x110)
|
||||
#define WCD9XXX_A_LDO_H_MODE_1__POR (0x65)
|
||||
#define WCD9XXX_A_MICB_CFILT_1_CTL__POR (0x40)
|
||||
#define WCD9XXX_A_TX_7_MBHC_TEST_CTL (0x174)
|
||||
#define WCD9XXX_A_TX_7_MBHC_TEST_CTL__POR (0x38)
|
||||
#define WCD9XXX_A_MBHC_SCALING_MUX_2 (0x14F)
|
||||
#define WCD9XXX_A_MBHC_SCALING_MUX_2__POR (0x80)
|
||||
#define WCD9XXX_A_TX_COM_BIAS (0x14C)
|
||||
#define WCD9XXX_A_TX_COM_BIAS__POR (0xF0)
|
||||
|
||||
#define WCD9XXX_A_MBHC_INSERT_DETECT (0x14A) /* TAIKO and later */
|
||||
#define WCD9XXX_A_MBHC_INSERT_DETECT__POR (0x00)
|
||||
#define WCD9XXX_A_MBHC_INSERT_DET_STATUS (0x14B) /* TAIKO and later */
|
||||
#define WCD9XXX_A_MBHC_INSERT_DET_STATUS__POR (0x00)
|
||||
#define WCD9XXX_A_MAD_ANA_CTRL (0x150)
|
||||
#define WCD9XXX_A_MAD_ANA_CTRL__POR (0xF1)
|
||||
|
||||
|
||||
#define WCD9XXX_A_CDC_CLK_OTHR_CTL (0x30C)
|
||||
#define WCD9XXX_A_CDC_CLK_OTHR_CTL__POR (0x00)
|
||||
|
||||
/* Class H related common registers */
|
||||
#define WCD9XXX_A_BUCK_MODE_1 (0x181)
|
||||
#define WCD9XXX_A_BUCK_MODE_1__POR (0x21)
|
||||
#define WCD9XXX_A_BUCK_MODE_2 (0x182)
|
||||
#define WCD9XXX_A_BUCK_MODE_2__POR (0xFF)
|
||||
#define WCD9XXX_A_BUCK_MODE_3 (0x183)
|
||||
#define WCD9XXX_A_BUCK_MODE_3__POR (0xCC)
|
||||
#define WCD9XXX_A_BUCK_MODE_4 (0x184)
|
||||
#define WCD9XXX_A_BUCK_MODE_4__POR (0x3A)
|
||||
#define WCD9XXX_A_BUCK_MODE_5 (0x185)
|
||||
#define WCD9XXX_A_BUCK_MODE_5__POR (0x00)
|
||||
#define WCD9XXX_A_BUCK_CTRL_VCL_1 (0x186)
|
||||
#define WCD9XXX_A_BUCK_CTRL_VCL_1__POR (0x48)
|
||||
#define WCD9XXX_A_BUCK_CTRL_VCL_2 (0x187)
|
||||
#define WCD9XXX_A_BUCK_CTRL_VCL_2__POR (0xA3)
|
||||
#define WCD9XXX_A_BUCK_CTRL_VCL_3 (0x188)
|
||||
#define WCD9XXX_A_BUCK_CTRL_VCL_3__POR (0x82)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_1 (0x189)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_1__POR (0xAB)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_2 (0x18A)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_2__POR (0xDC)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_3 (0x18B)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_3__POR (0x6A)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_4 (0x18C)
|
||||
#define WCD9XXX_A_BUCK_CTRL_CCL_4__POR (0x58)
|
||||
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1 (0x18D)
|
||||
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1__POR (0x50)
|
||||
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2 (0x18E)
|
||||
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2__POR (0x64)
|
||||
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3 (0x18F)
|
||||
#define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3__POR (0x77)
|
||||
#define WCD9XXX_A_BUCK_TMUX_A_D (0x190)
|
||||
#define WCD9XXX_A_BUCK_TMUX_A_D__POR (0x00)
|
||||
#define WCD9XXX_A_NCP_EN (0x192)
|
||||
#define WCD9XXX_A_NCP_EN__POR (0xFE)
|
||||
#define WCD9XXX_A_NCP_STATIC (0x194)
|
||||
#define WCD9XXX_A_NCP_STATIC__POR (0x28)
|
||||
#define WCD9XXX_A_NCP_BUCKREF (0x191)
|
||||
#define WCD9XXX_A_NCP_BUCKREF__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_B1_CTL (0x320)
|
||||
#define WCD9XXX_A_CDC_CLSH_B1_CTL__POR (0xE4)
|
||||
#define WCD9XXX_A_CDC_CLSH_B2_CTL (0x321)
|
||||
#define WCD9XXX_A_CDC_CLSH_B2_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_B3_CTL (0x322)
|
||||
#define WCD9XXX_A_CDC_CLSH_B3_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS (0x323)
|
||||
#define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD (0x324)
|
||||
#define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD__POR (0x12)
|
||||
#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD (0x325)
|
||||
#define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD__POR (0x0C)
|
||||
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD (0x326)
|
||||
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR (0x18)
|
||||
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD (0x327)
|
||||
#define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR (0x23)
|
||||
#define WCD9XXX_A_CDC_CLSH_K_ADDR (0x328)
|
||||
#define WCD9XXX_A_CDC_CLSH_K_ADDR__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_K_DATA (0x329)
|
||||
#define WCD9XXX_A_CDC_CLSH_K_DATA__POR (0xA4)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L (0x32A)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L__POR (0xD7)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U (0x32B)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U__POR (0x05)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L (0x32C)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L__POR (0x60)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U (0x32D)
|
||||
#define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U__POR (0x09)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR (0x32E)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH (0x32F)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR (0x330)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH (0x331)
|
||||
#define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH__POR (0x00)
|
||||
|
||||
#define WCD9XXX_A_CDC_RX1_B6_CTL (0x2B5)
|
||||
#define WCD9XXX_A_CDC_RX1_B6_CTL__POR (0x80)
|
||||
#define WCD9XXX_A_CDC_RX2_B6_CTL (0x2BD)
|
||||
#define WCD9XXX_A_CDC_RX2_B6_CTL__POR (0x80)
|
||||
#define WCD9XXX_A_RX_HPH_L_GAIN (0x1AE)
|
||||
#define WCD9XXX_A_RX_HPH_L_GAIN__POR (0x00)
|
||||
#define WCD9XXX_A_RX_HPH_R_GAIN (0x1B4)
|
||||
#define WCD9XXX_A_RX_HPH_R_GAIN__POR (0x00)
|
||||
#define WCD9XXX_A_RX_HPH_CHOP_CTL (0x1A5)
|
||||
#define WCD9XXX_A_RX_HPH_CHOP_CTL__POR (0xB4)
|
||||
#define WCD9XXX_A_RX_HPH_BIAS_PA (0x1A6)
|
||||
#define WCD9XXX_A_RX_HPH_BIAS_PA__POR (0x7A)
|
||||
#define WCD9XXX_A_RX_HPH_L_TEST (0x1AF)
|
||||
#define WCD9XXX_A_RX_HPH_L_TEST__POR (0x00)
|
||||
#define WCD9XXX_A_RX_HPH_R_TEST (0x1B5)
|
||||
#define WCD9XXX_A_RX_HPH_R_TEST__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_CLK_RX_B1_CTL (0x30F)
|
||||
#define WCD9XXX_A_CDC_CLK_RX_B1_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_NCP_CLK (0x193)
|
||||
#define WCD9XXX_A_NCP_CLK__POR (0x94)
|
||||
#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP (0x1A9)
|
||||
#define WCD9XXX_A_RX_HPH_BIAS_WG_OCP__POR (0x2A)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_WG_CTL (0x1AC)
|
||||
#define WCD9XXX_A_RX_HPH_CNP_WG_CTL__POR (0xDE)
|
||||
#define WCD9XXX_A_RX_HPH_L_PA_CTL (0x1B0)
|
||||
#define WCD9XXX_A_RX_HPH_L_PA_CTL__POR (0x42)
|
||||
#define WCD9XXX_A_RX_HPH_R_PA_CTL (0x1B6)
|
||||
#define WCD9XXX_A_RX_HPH_R_PA_CTL__POR (0x42)
|
||||
#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL (0x383)
|
||||
#define WCD9XXX_A_CDC_CONN_RX2_B1_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL (0x361)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B1_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL (0x362)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B2_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL (0x363)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B3_CTL__POR (0x00)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL (0x364)
|
||||
#define WCD9XXX_A_CDC_PA_RAMP_B4_CTL__POR (0x00)
|
||||
|
||||
#define WCD9330_A_LEAKAGE_CTL (0x03C)
|
||||
#define WCD9330_A_LEAKAGE_CTL__POR (0x04)
|
||||
#define WCD9330_A_CDC_CTL (0x034)
|
||||
#define WCD9330_A_CDC_CTL__POR (0x00)
|
||||
#endif
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
#ifndef UAPI_MMC_CORE_H
|
||||
#define UAPI_MMC_CORE_H
|
||||
|
||||
#define MMC_RSP_PRESENT (1 << 0)
|
||||
#define MMC_RSP_136 (1 << 1) /* 136 bit response */
|
||||
#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
|
||||
#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
|
||||
#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
|
||||
|
||||
#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
|
||||
#define MMC_CMD_AC (0 << 5)
|
||||
#define MMC_CMD_ADTC (1 << 5)
|
||||
#define MMC_CMD_BC (2 << 5)
|
||||
#define MMC_CMD_BCR (3 << 5)
|
||||
|
||||
#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
|
||||
#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */
|
||||
#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */
|
||||
#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
|
||||
|
||||
/*
|
||||
* These are the native response types, and correspond to valid bit
|
||||
* patterns of the above flags. One additional valid pattern
|
||||
* is all zeros, which means we don't expect a response.
|
||||
*/
|
||||
#define MMC_RSP_NONE (0)
|
||||
#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY)
|
||||
#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
|
||||
#define MMC_RSP_R3 (MMC_RSP_PRESENT)
|
||||
#define MMC_RSP_R4 (MMC_RSP_PRESENT)
|
||||
#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
|
||||
|
||||
#endif /* UAPI_MMC_CORE_H */
|
||||
|
|
@ -0,0 +1,111 @@
|
|||
#ifndef LINUX_MMC_IOCTL_H
|
||||
#define LINUX_MMC_IOCTL_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
struct mmc_ioc_cmd {
|
||||
/* Implies direction of data. true = write, false = read */
|
||||
int write_flag;
|
||||
|
||||
/* Application-specific command. true = precede with CMD55 */
|
||||
int is_acmd;
|
||||
|
||||
__u32 opcode;
|
||||
__u32 arg;
|
||||
__u32 response[4]; /* CMD response */
|
||||
unsigned int flags;
|
||||
unsigned int blksz;
|
||||
unsigned int blocks;
|
||||
|
||||
/*
|
||||
* Sleep at least postsleep_min_us useconds, and at most
|
||||
* postsleep_max_us useconds *after* issuing command. Needed for
|
||||
* some read commands for which cards have no other way of indicating
|
||||
* they're ready for the next command (i.e. there is no equivalent of
|
||||
* a "busy" indicator for read operations).
|
||||
*/
|
||||
unsigned int postsleep_min_us;
|
||||
unsigned int postsleep_max_us;
|
||||
|
||||
/*
|
||||
* Override driver-computed timeouts. Note the difference in units!
|
||||
*/
|
||||
unsigned int data_timeout_ns;
|
||||
unsigned int cmd_timeout_ms;
|
||||
|
||||
/*
|
||||
* For 64-bit machines, the next member, ``__u64 data_ptr``, wants to
|
||||
* be 8-byte aligned. Make sure this struct is the same size when
|
||||
* built for 32-bit.
|
||||
*/
|
||||
__u32 __pad;
|
||||
|
||||
/* DAT buffer */
|
||||
__u64 data_ptr;
|
||||
};
|
||||
#define mmc_ioc_cmd_set_data(ic, ptr) ic.data_ptr = (__u64)(unsigned long) ptr
|
||||
|
||||
#define MMC_IOC_CMD _IOWR(MMC_BLOCK_MAJOR, 0, struct mmc_ioc_cmd)
|
||||
|
||||
/**
|
||||
* There are four request types that are applicable for rpmb accesses- two
|
||||
* under read category and two under write. They are
|
||||
*
|
||||
* Reads
|
||||
* -------
|
||||
* 1. Read Write Counter
|
||||
* 2. Authenticated data read
|
||||
*
|
||||
*
|
||||
* Writes
|
||||
* -------
|
||||
* 1. Provision RPMB key (though it might be done in a secure environment)
|
||||
* 2. Authenticated data write
|
||||
*
|
||||
* While its given that the rpmb data frames are going to have that
|
||||
* information encoded in it and the frames should be generated by a secure
|
||||
* piece of code, the request types can be classified as above.
|
||||
*
|
||||
* So here are the set of commands that should be executed atomically in the
|
||||
* ioctl for rpmb read operation
|
||||
* 1. Switch partition
|
||||
* 2. Set block count
|
||||
* 3. Write data frame - CMD25 to write the rpmb data frame
|
||||
* 4. Set block count
|
||||
* 5. Read the data - CMD18 to do the actual read
|
||||
*
|
||||
* Similarly for rpmb write operation, these are the commands that should be
|
||||
* executed atomically in the ioctl for rpmb write operation
|
||||
* 1. Switch partition
|
||||
* 2. Set block count
|
||||
* 3. Write data frame - CMD25 to write the rpmb data frame with data
|
||||
* 4. Set block count
|
||||
* 5. Read the data - CMD25 to write rpmb data frame indicating that rpmb
|
||||
* result register is about to be read
|
||||
* 6. Set block count
|
||||
* 7. Read rpmb result - CMD18 to read the rpmb result register
|
||||
*
|
||||
* Each of the above commands should be sent individually via struct mmc_ioc_cmd
|
||||
* and fields like is_acmd that are not needed for rpmb operations will be
|
||||
* ignored.
|
||||
*/
|
||||
#define MMC_IOC_MAX_RPMB_CMD 3
|
||||
struct mmc_ioc_rpmb {
|
||||
struct mmc_ioc_cmd cmds[MMC_IOC_MAX_RPMB_CMD];
|
||||
};
|
||||
|
||||
/*
|
||||
* This ioctl is meant for use with rpmb partitions. This is needed since the
|
||||
* access procedure for this particular partition is different from regular
|
||||
* or normal partitions.
|
||||
*/
|
||||
#define MMC_IOC_RPMB_CMD _IOWR(MMC_BLOCK_MAJOR, 0, struct mmc_ioc_rpmb)
|
||||
|
||||
/*
|
||||
* Since this ioctl is only meant to enhance (and not replace) normal access
|
||||
* to the mmc bus device, an upper data transfer limit of MMC_IOC_MAX_BYTES
|
||||
* is enforced per ioctl call. For larger data transfers, use the normal
|
||||
* block device operations.
|
||||
*/
|
||||
#define MMC_IOC_MAX_BYTES (512L * 256)
|
||||
#endif /* LINUX_MMC_IOCTL_H */
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
#ifndef UAPI_MMC_MMC_H
|
||||
#define UAPI_MMC_MMC_H
|
||||
|
||||
/* Standard MMC commands (4.1) type argument response */
|
||||
/* class 1 */
|
||||
#define MMC_GO_IDLE_STATE 0 /* bc */
|
||||
#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
|
||||
#define MMC_ALL_SEND_CID 2 /* bcr R2 */
|
||||
#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
|
||||
#define MMC_SET_DSR 4 /* bc [31:16] RCA */
|
||||
#define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */
|
||||
#define MMC_SWITCH 6 /* ac [31:0] See below R1b */
|
||||
#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */
|
||||
#define MMC_SEND_EXT_CSD 8 /* adtc R1 */
|
||||
#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */
|
||||
#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
|
||||
#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
|
||||
#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
|
||||
#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
|
||||
#define MMC_BUS_TEST_R 14 /* adtc R1 */
|
||||
#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
|
||||
#define MMC_BUS_TEST_W 19 /* adtc R1 */
|
||||
#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
|
||||
#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
|
||||
|
||||
/* class 2 */
|
||||
#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
|
||||
#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
|
||||
#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
|
||||
#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */
|
||||
#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */
|
||||
#define MMC_SEND_TUNING_BLOCK_HS400 MMC_SEND_TUNING_BLOCK_HS200
|
||||
|
||||
/* class 3 */
|
||||
#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
|
||||
|
||||
/* class 4 */
|
||||
#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
|
||||
#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
|
||||
#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
|
||||
#define MMC_PROGRAM_CID 26 /* adtc R1 */
|
||||
#define MMC_PROGRAM_CSD 27 /* adtc R1 */
|
||||
|
||||
/* class 6 */
|
||||
#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
|
||||
#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
|
||||
#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
|
||||
|
||||
/* class 5 */
|
||||
#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
|
||||
#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
|
||||
#define MMC_ERASE 38 /* ac R1b */
|
||||
|
||||
/* class 9 */
|
||||
#define MMC_FAST_IO 39 /* ac <Complex> R4 */
|
||||
#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
|
||||
|
||||
/* class 7 */
|
||||
#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
|
||||
|
||||
/* class 8 */
|
||||
#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
|
||||
#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */
|
||||
|
||||
#endif /* UAPI_MMC_MMC_H */
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
#ifndef __MSM_CORE_LIB_H__
|
||||
#define __MSM_CORE_LIB_H__
|
||||
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define TEMP_DATA_POINTS 13
|
||||
#define MAX_NUM_FREQ 200
|
||||
|
||||
enum msm_core_ioctl_params {
|
||||
MSM_CORE_LEAKAGE,
|
||||
MSM_CORE_VOLTAGE,
|
||||
};
|
||||
|
||||
#define MSM_CORE_MAGIC 0x9D
|
||||
|
||||
struct sched_params {
|
||||
uint32_t cpumask;
|
||||
uint32_t cluster;
|
||||
uint32_t power[TEMP_DATA_POINTS][MAX_NUM_FREQ];
|
||||
uint32_t voltage[MAX_NUM_FREQ];
|
||||
uint32_t freq[MAX_NUM_FREQ];
|
||||
};
|
||||
|
||||
|
||||
#define EA_LEAKAGE _IOWR(MSM_CORE_MAGIC, MSM_CORE_LEAKAGE,\
|
||||
struct sched_params)
|
||||
#define EA_VOLT _IOWR(MSM_CORE_MAGIC, MSM_CORE_VOLTAGE,\
|
||||
struct sched_params)
|
||||
#endif
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
/*
|
||||
* Copyright (C) 2007 Google, Inc.
|
||||
* Author: Iliyan Malchev <ibm@android.com>
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
#ifndef _UAPI_LINUX_MSM_ADSP_H
|
||||
#define _UAPI_LINUX_MSM_ADSP_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define ADSP_IOCTL_MAGIC 'q'
|
||||
|
||||
/* ADSP_IOCTL_WRITE_COMMAND */
|
||||
struct adsp_command_t {
|
||||
uint16_t queue;
|
||||
uint32_t len; /* bytes */
|
||||
uint8_t *data;
|
||||
};
|
||||
|
||||
/* ADSP_IOCTL_GET_EVENT */
|
||||
struct adsp_event_t {
|
||||
uint16_t type; /* 1 == event (RPC), 0 == message (adsp) */
|
||||
uint32_t timeout_ms; /* -1 for infinite, 0 for immediate return */
|
||||
uint16_t msg_id;
|
||||
uint16_t flags; /* 1 == 16--bit event, 0 == 32-bit event */
|
||||
uint32_t len; /* size in, number of bytes out */
|
||||
uint8_t *data;
|
||||
};
|
||||
|
||||
#define ADSP_IOCTL_ENABLE \
|
||||
_IOR(ADSP_IOCTL_MAGIC, 1, unsigned)
|
||||
|
||||
#define ADSP_IOCTL_DISABLE \
|
||||
_IOR(ADSP_IOCTL_MAGIC, 2, unsigned)
|
||||
|
||||
#define ADSP_IOCTL_DISABLE_ACK \
|
||||
_IOR(ADSP_IOCTL_MAGIC, 3, unsigned)
|
||||
|
||||
#define ADSP_IOCTL_WRITE_COMMAND \
|
||||
_IOR(ADSP_IOCTL_MAGIC, 4, struct adsp_command_t *)
|
||||
|
||||
#define ADSP_IOCTL_GET_EVENT \
|
||||
_IOWR(ADSP_IOCTL_MAGIC, 5, struct adsp_event_data_t *)
|
||||
|
||||
#define ADSP_IOCTL_SET_CLKRATE \
|
||||
_IOR(ADSP_IOCTL_MAGIC, 6, unsigned)
|
||||
|
||||
#define ADSP_IOCTL_DISABLE_EVENT_RSP \
|
||||
_IOR(ADSP_IOCTL_MAGIC, 10, unsigned)
|
||||
|
||||
#define ADSP_IOCTL_REGISTER_PMEM \
|
||||
_IOW(ADSP_IOCTL_MAGIC, 13, unsigned)
|
||||
|
||||
#define ADSP_IOCTL_UNREGISTER_PMEM \
|
||||
_IOW(ADSP_IOCTL_MAGIC, 14, unsigned)
|
||||
|
||||
/* Cause any further GET_EVENT ioctls to fail (-ENODEV)
|
||||
* until the device is closed and reopened. Useful for
|
||||
* terminating event dispatch threads
|
||||
*/
|
||||
#define ADSP_IOCTL_ABORT_EVENT_READ \
|
||||
_IOW(ADSP_IOCTL_MAGIC, 15, unsigned)
|
||||
|
||||
#define ADSP_IOCTL_LINK_TASK \
|
||||
_IOW(ADSP_IOCTL_MAGIC, 16, unsigned)
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,460 @@
|
|||
/* include/linux/msm_audio.h
|
||||
*
|
||||
* Copyright (C) 2008 Google, Inc.
|
||||
* Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _UAPI_LINUX_MSM_AUDIO_H
|
||||
#define _UAPI_LINUX_MSM_AUDIO_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
/* PCM Audio */
|
||||
|
||||
#define AUDIO_IOCTL_MAGIC 'a'
|
||||
|
||||
#define AUDIO_START _IOW(AUDIO_IOCTL_MAGIC, 0, unsigned)
|
||||
#define AUDIO_STOP _IOW(AUDIO_IOCTL_MAGIC, 1, unsigned)
|
||||
#define AUDIO_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 2, unsigned)
|
||||
#define AUDIO_GET_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 3, \
|
||||
struct msm_audio_config)
|
||||
#define AUDIO_SET_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 4, \
|
||||
struct msm_audio_config)
|
||||
#define AUDIO_GET_STATS _IOR(AUDIO_IOCTL_MAGIC, 5, \
|
||||
struct msm_audio_stats)
|
||||
#define AUDIO_ENABLE_AUDPP _IOW(AUDIO_IOCTL_MAGIC, 6, unsigned)
|
||||
#define AUDIO_SET_ADRC _IOW(AUDIO_IOCTL_MAGIC, 7, unsigned)
|
||||
#define AUDIO_SET_EQ _IOW(AUDIO_IOCTL_MAGIC, 8, unsigned)
|
||||
#define AUDIO_SET_RX_IIR _IOW(AUDIO_IOCTL_MAGIC, 9, unsigned)
|
||||
#define AUDIO_SET_VOLUME _IOW(AUDIO_IOCTL_MAGIC, 10, unsigned)
|
||||
#define AUDIO_PAUSE _IOW(AUDIO_IOCTL_MAGIC, 11, unsigned)
|
||||
#define AUDIO_PLAY_DTMF _IOW(AUDIO_IOCTL_MAGIC, 12, unsigned)
|
||||
#define AUDIO_GET_EVENT _IOR(AUDIO_IOCTL_MAGIC, 13, \
|
||||
struct msm_audio_event)
|
||||
#define AUDIO_ABORT_GET_EVENT _IOW(AUDIO_IOCTL_MAGIC, 14, unsigned)
|
||||
#define AUDIO_REGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 15, unsigned)
|
||||
#define AUDIO_DEREGISTER_PMEM _IOW(AUDIO_IOCTL_MAGIC, 16, unsigned)
|
||||
#define AUDIO_ASYNC_WRITE _IOW(AUDIO_IOCTL_MAGIC, 17, \
|
||||
struct msm_audio_aio_buf)
|
||||
#define AUDIO_ASYNC_READ _IOW(AUDIO_IOCTL_MAGIC, 18, \
|
||||
struct msm_audio_aio_buf)
|
||||
#define AUDIO_SET_INCALL _IOW(AUDIO_IOCTL_MAGIC, 19, struct msm_voicerec_mode)
|
||||
#define AUDIO_GET_NUM_SND_DEVICE _IOR(AUDIO_IOCTL_MAGIC, 20, unsigned)
|
||||
#define AUDIO_GET_SND_DEVICES _IOWR(AUDIO_IOCTL_MAGIC, 21, \
|
||||
struct msm_snd_device_list)
|
||||
#define AUDIO_ENABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 22, unsigned)
|
||||
#define AUDIO_DISABLE_SND_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 23, unsigned)
|
||||
#define AUDIO_ROUTE_STREAM _IOW(AUDIO_IOCTL_MAGIC, 24, \
|
||||
struct msm_audio_route_config)
|
||||
#define AUDIO_GET_PCM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 30, unsigned)
|
||||
#define AUDIO_SET_PCM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 31, unsigned)
|
||||
#define AUDIO_SWITCH_DEVICE _IOW(AUDIO_IOCTL_MAGIC, 32, unsigned)
|
||||
#define AUDIO_SET_MUTE _IOW(AUDIO_IOCTL_MAGIC, 33, unsigned)
|
||||
#define AUDIO_UPDATE_ACDB _IOW(AUDIO_IOCTL_MAGIC, 34, unsigned)
|
||||
#define AUDIO_START_VOICE _IOW(AUDIO_IOCTL_MAGIC, 35, unsigned)
|
||||
#define AUDIO_STOP_VOICE _IOW(AUDIO_IOCTL_MAGIC, 36, unsigned)
|
||||
#define AUDIO_REINIT_ACDB _IOW(AUDIO_IOCTL_MAGIC, 39, unsigned)
|
||||
#define AUDIO_OUTPORT_FLUSH _IOW(AUDIO_IOCTL_MAGIC, 40, unsigned short)
|
||||
#define AUDIO_SET_ERR_THRESHOLD_VALUE _IOW(AUDIO_IOCTL_MAGIC, 41, \
|
||||
unsigned short)
|
||||
#define AUDIO_GET_BITSTREAM_ERROR_INFO _IOR(AUDIO_IOCTL_MAGIC, 42, \
|
||||
struct msm_audio_bitstream_error_info)
|
||||
|
||||
#define AUDIO_SET_SRS_TRUMEDIA_PARAM _IOW(AUDIO_IOCTL_MAGIC, 43, unsigned)
|
||||
|
||||
/* Qualcomm extensions */
|
||||
#define AUDIO_SET_STREAM_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 80, \
|
||||
struct msm_audio_stream_config)
|
||||
#define AUDIO_GET_STREAM_CONFIG _IOR(AUDIO_IOCTL_MAGIC, 81, \
|
||||
struct msm_audio_stream_config)
|
||||
#define AUDIO_GET_SESSION_ID _IOR(AUDIO_IOCTL_MAGIC, 82, unsigned short)
|
||||
#define AUDIO_GET_STREAM_INFO _IOR(AUDIO_IOCTL_MAGIC, 83, \
|
||||
struct msm_audio_bitstream_info)
|
||||
#define AUDIO_SET_PAN _IOW(AUDIO_IOCTL_MAGIC, 84, unsigned)
|
||||
#define AUDIO_SET_QCONCERT_PLUS _IOW(AUDIO_IOCTL_MAGIC, 85, unsigned)
|
||||
#define AUDIO_SET_MBADRC _IOW(AUDIO_IOCTL_MAGIC, 86, unsigned)
|
||||
#define AUDIO_SET_VOLUME_PATH _IOW(AUDIO_IOCTL_MAGIC, 87, \
|
||||
struct msm_vol_info)
|
||||
#define AUDIO_SET_MAX_VOL_ALL _IOW(AUDIO_IOCTL_MAGIC, 88, unsigned)
|
||||
#define AUDIO_ENABLE_AUDPRE _IOW(AUDIO_IOCTL_MAGIC, 89, unsigned)
|
||||
#define AUDIO_SET_AGC _IOW(AUDIO_IOCTL_MAGIC, 90, unsigned)
|
||||
#define AUDIO_SET_NS _IOW(AUDIO_IOCTL_MAGIC, 91, unsigned)
|
||||
#define AUDIO_SET_TX_IIR _IOW(AUDIO_IOCTL_MAGIC, 92, unsigned)
|
||||
#define AUDIO_GET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 93, \
|
||||
struct msm_audio_buf_cfg)
|
||||
#define AUDIO_SET_BUF_CFG _IOW(AUDIO_IOCTL_MAGIC, 94, \
|
||||
struct msm_audio_buf_cfg)
|
||||
#define AUDIO_SET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 95, \
|
||||
struct msm_acdb_cmd_device)
|
||||
#define AUDIO_GET_ACDB_BLK _IOW(AUDIO_IOCTL_MAGIC, 96, \
|
||||
struct msm_acdb_cmd_device)
|
||||
|
||||
#define AUDIO_REGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 97, \
|
||||
struct msm_audio_ion_info)
|
||||
#define AUDIO_DEREGISTER_ION _IOW(AUDIO_IOCTL_MAGIC, 98, \
|
||||
struct msm_audio_ion_info)
|
||||
#define AUDIO_SET_EFFECTS_CONFIG _IOW(AUDIO_IOCTL_MAGIC, 99, \
|
||||
struct msm_hwacc_effects_config)
|
||||
#define AUDIO_EFFECTS_SET_BUF_LEN _IOW(AUDIO_IOCTL_MAGIC, 100, \
|
||||
struct msm_hwacc_buf_cfg)
|
||||
#define AUDIO_EFFECTS_GET_BUF_AVAIL _IOW(AUDIO_IOCTL_MAGIC, 101, \
|
||||
struct msm_hwacc_buf_avail)
|
||||
#define AUDIO_EFFECTS_WRITE _IOW(AUDIO_IOCTL_MAGIC, 102, void *)
|
||||
#define AUDIO_EFFECTS_READ _IOWR(AUDIO_IOCTL_MAGIC, 103, void *)
|
||||
#define AUDIO_EFFECTS_SET_PP_PARAMS _IOW(AUDIO_IOCTL_MAGIC, 104, void *)
|
||||
|
||||
#define AUDIO_MAX_COMMON_IOCTL_NUM 105
|
||||
|
||||
|
||||
#define HANDSET_MIC 0x01
|
||||
#define HANDSET_SPKR 0x02
|
||||
#define HEADSET_MIC 0x03
|
||||
#define HEADSET_SPKR_MONO 0x04
|
||||
#define HEADSET_SPKR_STEREO 0x05
|
||||
#define SPKR_PHONE_MIC 0x06
|
||||
#define SPKR_PHONE_MONO 0x07
|
||||
#define SPKR_PHONE_STEREO 0x08
|
||||
#define BT_SCO_MIC 0x09
|
||||
#define BT_SCO_SPKR 0x0A
|
||||
#define BT_A2DP_SPKR 0x0B
|
||||
#define TTY_HEADSET_MIC 0x0C
|
||||
#define TTY_HEADSET_SPKR 0x0D
|
||||
|
||||
/* Default devices are not supported in a */
|
||||
/* device switching context. Only supported */
|
||||
/* for stream devices. */
|
||||
/* DO NOT USE */
|
||||
#define DEFAULT_TX 0x0E
|
||||
#define DEFAULT_RX 0x0F
|
||||
|
||||
#define BT_A2DP_TX 0x10
|
||||
|
||||
#define HEADSET_MONO_PLUS_SPKR_MONO_RX 0x11
|
||||
#define HEADSET_MONO_PLUS_SPKR_STEREO_RX 0x12
|
||||
#define HEADSET_STEREO_PLUS_SPKR_MONO_RX 0x13
|
||||
#define HEADSET_STEREO_PLUS_SPKR_STEREO_RX 0x14
|
||||
|
||||
#define I2S_RX 0x20
|
||||
#define I2S_TX 0x21
|
||||
|
||||
#define ADRC_ENABLE 0x0001
|
||||
#define EQUALIZER_ENABLE 0x0002
|
||||
#define IIR_ENABLE 0x0004
|
||||
#define QCONCERT_PLUS_ENABLE 0x0008
|
||||
#define MBADRC_ENABLE 0x0010
|
||||
#define SRS_ENABLE 0x0020
|
||||
#define SRS_DISABLE 0x0040
|
||||
|
||||
#define AGC_ENABLE 0x0001
|
||||
#define NS_ENABLE 0x0002
|
||||
#define TX_IIR_ENABLE 0x0004
|
||||
#define FLUENCE_ENABLE 0x0008
|
||||
|
||||
#define VOC_REC_UPLINK 0x00
|
||||
#define VOC_REC_DOWNLINK 0x01
|
||||
#define VOC_REC_BOTH 0x02
|
||||
|
||||
struct msm_audio_config {
|
||||
uint32_t buffer_size;
|
||||
uint32_t buffer_count;
|
||||
uint32_t channel_count;
|
||||
uint32_t sample_rate;
|
||||
uint32_t type;
|
||||
uint32_t meta_field;
|
||||
uint32_t bits;
|
||||
uint32_t unused[3];
|
||||
};
|
||||
|
||||
struct msm_audio_stream_config {
|
||||
uint32_t buffer_size;
|
||||
uint32_t buffer_count;
|
||||
};
|
||||
|
||||
struct msm_audio_buf_cfg{
|
||||
uint32_t meta_info_enable;
|
||||
uint32_t frames_per_buf;
|
||||
};
|
||||
|
||||
struct msm_audio_stats {
|
||||
uint32_t byte_count;
|
||||
uint32_t sample_count;
|
||||
uint32_t unused[2];
|
||||
};
|
||||
|
||||
struct msm_audio_ion_info {
|
||||
int fd;
|
||||
void *vaddr;
|
||||
};
|
||||
|
||||
struct msm_audio_pmem_info {
|
||||
int fd;
|
||||
void *vaddr;
|
||||
};
|
||||
|
||||
struct msm_audio_aio_buf {
|
||||
void *buf_addr;
|
||||
uint32_t buf_len;
|
||||
uint32_t data_len;
|
||||
void *private_data;
|
||||
unsigned short mfield_sz; /*only useful for data has meta field */
|
||||
};
|
||||
|
||||
/* Audio routing */
|
||||
|
||||
#define SND_IOCTL_MAGIC 's'
|
||||
|
||||
#define SND_MUTE_UNMUTED 0
|
||||
#define SND_MUTE_MUTED 1
|
||||
|
||||
struct msm_mute_info {
|
||||
uint32_t mute;
|
||||
uint32_t path;
|
||||
};
|
||||
|
||||
struct msm_vol_info {
|
||||
uint32_t vol;
|
||||
uint32_t path;
|
||||
};
|
||||
|
||||
struct msm_voicerec_mode {
|
||||
uint32_t rec_mode;
|
||||
};
|
||||
|
||||
struct msm_snd_device_config {
|
||||
uint32_t device;
|
||||
uint32_t ear_mute;
|
||||
uint32_t mic_mute;
|
||||
};
|
||||
|
||||
#define SND_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_device_config *)
|
||||
|
||||
enum cad_device_path_type {
|
||||
CAD_DEVICE_PATH_RX, /*For Decoding session*/
|
||||
CAD_DEVICE_PATH_TX, /* For Encoding session*/
|
||||
CAD_DEVICE_PATH_RX_TX, /* For Voice call */
|
||||
CAD_DEVICE_PATH_LB, /* For loopback (FM Analog)*/
|
||||
CAD_DEVICE_PATH_MAX
|
||||
};
|
||||
|
||||
struct cad_devices_type {
|
||||
uint32_t rx_device;
|
||||
uint32_t tx_device;
|
||||
enum cad_device_path_type pathtype;
|
||||
};
|
||||
|
||||
struct msm_cad_device_config {
|
||||
struct cad_devices_type device;
|
||||
uint32_t ear_mute;
|
||||
uint32_t mic_mute;
|
||||
};
|
||||
|
||||
#define CAD_SET_DEVICE _IOW(SND_IOCTL_MAGIC, 2, struct msm_cad_device_config *)
|
||||
|
||||
#define SND_METHOD_VOICE 0
|
||||
#define SND_METHOD_MIDI 4
|
||||
|
||||
struct msm_snd_volume_config {
|
||||
uint32_t device;
|
||||
uint32_t method;
|
||||
uint32_t volume;
|
||||
};
|
||||
|
||||
#define SND_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_snd_volume_config *)
|
||||
|
||||
struct msm_cad_volume_config {
|
||||
struct cad_devices_type device;
|
||||
uint32_t method;
|
||||
uint32_t volume;
|
||||
};
|
||||
|
||||
#define CAD_SET_VOLUME _IOW(SND_IOCTL_MAGIC, 3, struct msm_cad_volume_config *)
|
||||
|
||||
/* Returns the number of SND endpoints supported. */
|
||||
|
||||
#define SND_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *)
|
||||
|
||||
struct msm_snd_endpoint {
|
||||
int id; /* input and output */
|
||||
char name[64]; /* output only */
|
||||
};
|
||||
|
||||
/* Takes an index between 0 and one less than the number returned by
|
||||
* SND_GET_NUM_ENDPOINTS, and returns the SND index and name of a
|
||||
* SND endpoint. On input, the .id field contains the number of the
|
||||
* endpoint, and on exit it contains the SND index, while .name contains
|
||||
* the description of the endpoint.
|
||||
*/
|
||||
|
||||
#define SND_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_snd_endpoint *)
|
||||
|
||||
|
||||
#define SND_AVC_CTL _IOW(SND_IOCTL_MAGIC, 6, unsigned *)
|
||||
#define SND_AGC_CTL _IOW(SND_IOCTL_MAGIC, 7, unsigned *)
|
||||
|
||||
/*return the number of CAD endpoints supported. */
|
||||
|
||||
#define CAD_GET_NUM_ENDPOINTS _IOR(SND_IOCTL_MAGIC, 4, unsigned *)
|
||||
|
||||
struct msm_cad_endpoint {
|
||||
int id; /* input and output */
|
||||
char name[64]; /* output only */
|
||||
};
|
||||
|
||||
/* Takes an index between 0 and one less than the number returned by
|
||||
* SND_GET_NUM_ENDPOINTS, and returns the CAD index and name of a
|
||||
* CAD endpoint. On input, the .id field contains the number of the
|
||||
* endpoint, and on exit it contains the SND index, while .name contains
|
||||
* the description of the endpoint.
|
||||
*/
|
||||
|
||||
#define CAD_GET_ENDPOINT _IOWR(SND_IOCTL_MAGIC, 5, struct msm_cad_endpoint *)
|
||||
|
||||
struct msm_audio_pcm_config {
|
||||
uint32_t pcm_feedback; /* 0 - disable > 0 - enable */
|
||||
uint32_t buffer_count; /* Number of buffers to allocate */
|
||||
uint32_t buffer_size; /* Size of buffer for capturing of
|
||||
PCM samples */
|
||||
};
|
||||
|
||||
#define AUDIO_EVENT_SUSPEND 0
|
||||
#define AUDIO_EVENT_RESUME 1
|
||||
#define AUDIO_EVENT_WRITE_DONE 2
|
||||
#define AUDIO_EVENT_READ_DONE 3
|
||||
#define AUDIO_EVENT_STREAM_INFO 4
|
||||
#define AUDIO_EVENT_BITSTREAM_ERROR_INFO 5
|
||||
|
||||
#define AUDIO_CODEC_TYPE_MP3 0
|
||||
#define AUDIO_CODEC_TYPE_AAC 1
|
||||
|
||||
struct msm_audio_bitstream_info {
|
||||
uint32_t codec_type;
|
||||
uint32_t chan_info;
|
||||
uint32_t sample_rate;
|
||||
uint32_t bit_stream_info;
|
||||
uint32_t bit_rate;
|
||||
uint32_t unused[3];
|
||||
};
|
||||
|
||||
struct msm_audio_bitstream_error_info {
|
||||
uint32_t dec_id;
|
||||
uint32_t err_msg_indicator;
|
||||
uint32_t err_type;
|
||||
};
|
||||
|
||||
union msm_audio_event_payload {
|
||||
struct msm_audio_aio_buf aio_buf;
|
||||
struct msm_audio_bitstream_info stream_info;
|
||||
struct msm_audio_bitstream_error_info error_info;
|
||||
int reserved;
|
||||
};
|
||||
|
||||
struct msm_audio_event {
|
||||
int event_type;
|
||||
int timeout_ms;
|
||||
union msm_audio_event_payload event_payload;
|
||||
};
|
||||
|
||||
#define MSM_SNDDEV_CAP_RX 0x1
|
||||
#define MSM_SNDDEV_CAP_TX 0x2
|
||||
#define MSM_SNDDEV_CAP_VOICE 0x4
|
||||
|
||||
struct msm_snd_device_info {
|
||||
uint32_t dev_id;
|
||||
uint32_t dev_cap; /* bitmask describe capability of device */
|
||||
char dev_name[64];
|
||||
};
|
||||
|
||||
struct msm_snd_device_list {
|
||||
uint32_t num_dev; /* Indicate number of device info to be retrieved */
|
||||
struct msm_snd_device_info *list;
|
||||
};
|
||||
|
||||
struct msm_dtmf_config {
|
||||
uint16_t path;
|
||||
uint16_t dtmf_hi;
|
||||
uint16_t dtmf_low;
|
||||
uint16_t duration;
|
||||
uint16_t tx_gain;
|
||||
uint16_t rx_gain;
|
||||
uint16_t mixing;
|
||||
};
|
||||
|
||||
#define AUDIO_ROUTE_STREAM_VOICE_RX 0
|
||||
#define AUDIO_ROUTE_STREAM_VOICE_TX 1
|
||||
#define AUDIO_ROUTE_STREAM_PLAYBACK 2
|
||||
#define AUDIO_ROUTE_STREAM_REC 3
|
||||
|
||||
struct msm_audio_route_config {
|
||||
uint32_t stream_type;
|
||||
uint32_t stream_id;
|
||||
uint32_t dev_id;
|
||||
};
|
||||
|
||||
#define AUDIO_MAX_EQ_BANDS 12
|
||||
|
||||
struct msm_audio_eq_band {
|
||||
uint16_t band_idx; /* The band index, 0 .. 11 */
|
||||
uint32_t filter_type; /* Filter band type */
|
||||
uint32_t center_freq_hz; /* Filter band center frequency */
|
||||
uint32_t filter_gain; /* Filter band initial gain (dB) */
|
||||
/* Range is +12 dB to -12 dB with 1dB increments. */
|
||||
uint32_t q_factor;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct msm_audio_eq_stream_config {
|
||||
uint32_t enable; /* Number of consequtive bands specified */
|
||||
uint32_t num_bands;
|
||||
struct msm_audio_eq_band eq_bands[AUDIO_MAX_EQ_BANDS];
|
||||
} __attribute__ ((packed));
|
||||
|
||||
struct msm_acdb_cmd_device {
|
||||
uint32_t command_id;
|
||||
uint32_t device_id;
|
||||
uint32_t network_id;
|
||||
uint32_t sample_rate_id; /* Actual sample rate value */
|
||||
uint32_t interface_id; /* See interface id's above */
|
||||
uint32_t algorithm_block_id; /* See enumerations above */
|
||||
uint32_t total_bytes; /* Length in bytes used by buffer */
|
||||
uint32_t *phys_buf; /* Physical Address of data */
|
||||
};
|
||||
|
||||
struct msm_hwacc_data_config {
|
||||
__u32 buf_size;
|
||||
__u32 num_buf;
|
||||
__u32 num_channels;
|
||||
__u8 channel_map[8];
|
||||
__u32 sample_rate;
|
||||
__u32 bits_per_sample;
|
||||
};
|
||||
|
||||
struct msm_hwacc_buf_cfg {
|
||||
__u32 input_len;
|
||||
__u32 output_len;
|
||||
};
|
||||
|
||||
struct msm_hwacc_buf_avail {
|
||||
__u32 input_num_avail;
|
||||
__u32 output_num_avail;
|
||||
};
|
||||
|
||||
struct msm_hwacc_effects_config {
|
||||
struct msm_hwacc_data_config input;
|
||||
struct msm_hwacc_data_config output;
|
||||
struct msm_hwacc_buf_cfg buf_cfg;
|
||||
__u32 meta_mode_enabled;
|
||||
__u32 overwrite_topology;
|
||||
__s32 topology;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,76 @@
|
|||
#ifndef _UAPI_MSM_AUDIO_AAC_H
|
||||
#define _UAPI_MSM_AUDIO_AAC_H
|
||||
|
||||
#include <linux/msm_audio.h>
|
||||
|
||||
#define AUDIO_SET_AAC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_aac_config)
|
||||
#define AUDIO_GET_AAC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_aac_config)
|
||||
|
||||
#define AUDIO_SET_AAC_ENC_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+3), struct msm_audio_aac_enc_config)
|
||||
|
||||
#define AUDIO_GET_AAC_ENC_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+4), struct msm_audio_aac_enc_config)
|
||||
|
||||
#define AUDIO_SET_AAC_MIX_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+5), uint32_t)
|
||||
|
||||
#define AUDIO_AAC_FORMAT_ADTS -1
|
||||
#define AUDIO_AAC_FORMAT_RAW 0x0000
|
||||
#define AUDIO_AAC_FORMAT_PSUEDO_RAW 0x0001
|
||||
#define AUDIO_AAC_FORMAT_LOAS 0x0002
|
||||
#define AUDIO_AAC_FORMAT_ADIF 0x0003
|
||||
|
||||
#define AUDIO_AAC_OBJECT_LC 0x0002
|
||||
#define AUDIO_AAC_OBJECT_LTP 0x0004
|
||||
#define AUDIO_AAC_OBJECT_ERLC 0x0011
|
||||
#define AUDIO_AAC_OBJECT_BSAC 0x0016
|
||||
|
||||
#define AUDIO_AAC_SEC_DATA_RES_ON 0x0001
|
||||
#define AUDIO_AAC_SEC_DATA_RES_OFF 0x0000
|
||||
|
||||
#define AUDIO_AAC_SCA_DATA_RES_ON 0x0001
|
||||
#define AUDIO_AAC_SCA_DATA_RES_OFF 0x0000
|
||||
|
||||
#define AUDIO_AAC_SPEC_DATA_RES_ON 0x0001
|
||||
#define AUDIO_AAC_SPEC_DATA_RES_OFF 0x0000
|
||||
|
||||
#define AUDIO_AAC_SBR_ON_FLAG_ON 0x0001
|
||||
#define AUDIO_AAC_SBR_ON_FLAG_OFF 0x0000
|
||||
|
||||
#define AUDIO_AAC_SBR_PS_ON_FLAG_ON 0x0001
|
||||
#define AUDIO_AAC_SBR_PS_ON_FLAG_OFF 0x0000
|
||||
|
||||
/* Primary channel on both left and right channels */
|
||||
#define AUDIO_AAC_DUAL_MONO_PL_PR 0
|
||||
/* Secondary channel on both left and right channels */
|
||||
#define AUDIO_AAC_DUAL_MONO_SL_SR 1
|
||||
/* Primary channel on right channel and 2nd on left channel */
|
||||
#define AUDIO_AAC_DUAL_MONO_SL_PR 2
|
||||
/* 2nd channel on right channel and primary on left channel */
|
||||
#define AUDIO_AAC_DUAL_MONO_PL_SR 3
|
||||
|
||||
struct msm_audio_aac_config {
|
||||
signed short format;
|
||||
unsigned short audio_object;
|
||||
unsigned short ep_config; /* 0 ~ 3 useful only obj = ERLC */
|
||||
unsigned short aac_section_data_resilience_flag;
|
||||
unsigned short aac_scalefactor_data_resilience_flag;
|
||||
unsigned short aac_spectral_data_resilience_flag;
|
||||
unsigned short sbr_on_flag;
|
||||
unsigned short sbr_ps_on_flag;
|
||||
unsigned short dual_mono_mode;
|
||||
unsigned short channel_configuration;
|
||||
unsigned short sample_rate;
|
||||
};
|
||||
|
||||
struct msm_audio_aac_enc_config {
|
||||
uint32_t channels;
|
||||
uint32_t sample_rate;
|
||||
uint32_t bit_rate;
|
||||
uint32_t stream_format;
|
||||
};
|
||||
|
||||
#endif /* _UAPI_MSM_AUDIO_AAC_H */
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
#ifndef _UAPI_MSM_AUDIO_AMR_WB_PLUS_H
|
||||
#define _UAPI_MSM_AUDIO_AMR_WB_PLUS_H
|
||||
|
||||
#define AUDIO_GET_AMRWBPLUS_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+2), struct msm_audio_amrwbplus_config_v2)
|
||||
#define AUDIO_SET_AMRWBPLUS_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+3), struct msm_audio_amrwbplus_config_v2)
|
||||
|
||||
struct msm_audio_amrwbplus_config_v2 {
|
||||
unsigned int size_bytes;
|
||||
unsigned int version;
|
||||
unsigned int num_channels;
|
||||
unsigned int amr_band_mode;
|
||||
unsigned int amr_dtx_mode;
|
||||
unsigned int amr_frame_fmt;
|
||||
unsigned int amr_lsf_idx;
|
||||
};
|
||||
#endif /* _UAPI_MSM_AUDIO_AMR_WB_PLUS_H */
|
||||
|
|
@ -0,0 +1,604 @@
|
|||
#ifndef _UAPI_MSM_AUDIO_CALIBRATION_H
|
||||
#define _UAPI_MSM_AUDIO_CALIBRATION_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define CAL_IOCTL_MAGIC 'a'
|
||||
|
||||
#define AUDIO_ALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
|
||||
200, void *)
|
||||
#define AUDIO_DEALLOCATE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
|
||||
201, void *)
|
||||
#define AUDIO_PREPARE_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
|
||||
202, void *)
|
||||
#define AUDIO_SET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
|
||||
203, void *)
|
||||
#define AUDIO_GET_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
|
||||
204, void *)
|
||||
#define AUDIO_POST_CALIBRATION _IOWR(CAL_IOCTL_MAGIC, \
|
||||
205, void *)
|
||||
|
||||
/* For Real-Time Audio Calibration */
|
||||
#define AUDIO_GET_RTAC_ADM_INFO _IOR(CAL_IOCTL_MAGIC, \
|
||||
207, void *)
|
||||
#define AUDIO_GET_RTAC_VOICE_INFO _IOR(CAL_IOCTL_MAGIC, \
|
||||
208, void *)
|
||||
#define AUDIO_GET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
209, void *)
|
||||
#define AUDIO_SET_RTAC_ADM_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
210, void *)
|
||||
#define AUDIO_GET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
211, void *)
|
||||
#define AUDIO_SET_RTAC_ASM_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
212, void *)
|
||||
#define AUDIO_GET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
213, void *)
|
||||
#define AUDIO_SET_RTAC_CVS_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
214, void *)
|
||||
#define AUDIO_GET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
215, void *)
|
||||
#define AUDIO_SET_RTAC_CVP_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
216, void *)
|
||||
#define AUDIO_GET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
217, void *)
|
||||
#define AUDIO_SET_RTAC_AFE_CAL _IOWR(CAL_IOCTL_MAGIC, \
|
||||
218, void *)
|
||||
enum {
|
||||
CVP_VOC_RX_TOPOLOGY_CAL_TYPE = 0,
|
||||
CVP_VOC_TX_TOPOLOGY_CAL_TYPE,
|
||||
CVP_VOCPROC_STATIC_CAL_TYPE,
|
||||
CVP_VOCPROC_DYNAMIC_CAL_TYPE,
|
||||
CVS_VOCSTRM_STATIC_CAL_TYPE,
|
||||
CVP_VOCDEV_CFG_CAL_TYPE,
|
||||
CVP_VOCPROC_STATIC_COL_CAL_TYPE,
|
||||
CVP_VOCPROC_DYNAMIC_COL_CAL_TYPE,
|
||||
CVS_VOCSTRM_STATIC_COL_CAL_TYPE,
|
||||
|
||||
ADM_TOPOLOGY_CAL_TYPE,
|
||||
ADM_CUST_TOPOLOGY_CAL_TYPE,
|
||||
ADM_AUDPROC_CAL_TYPE,
|
||||
ADM_AUDVOL_CAL_TYPE,
|
||||
|
||||
ASM_TOPOLOGY_CAL_TYPE,
|
||||
ASM_CUST_TOPOLOGY_CAL_TYPE,
|
||||
ASM_AUDSTRM_CAL_TYPE,
|
||||
|
||||
AFE_COMMON_RX_CAL_TYPE,
|
||||
AFE_COMMON_TX_CAL_TYPE,
|
||||
AFE_ANC_CAL_TYPE,
|
||||
AFE_AANC_CAL_TYPE,
|
||||
AFE_FB_SPKR_PROT_CAL_TYPE,
|
||||
AFE_HW_DELAY_CAL_TYPE,
|
||||
AFE_SIDETONE_CAL_TYPE,
|
||||
AFE_TOPOLOGY_CAL_TYPE,
|
||||
AFE_CUST_TOPOLOGY_CAL_TYPE,
|
||||
|
||||
LSM_CUST_TOPOLOGY_CAL_TYPE,
|
||||
LSM_TOPOLOGY_CAL_TYPE,
|
||||
LSM_CAL_TYPE,
|
||||
|
||||
ADM_RTAC_INFO_CAL_TYPE,
|
||||
VOICE_RTAC_INFO_CAL_TYPE,
|
||||
ADM_RTAC_APR_CAL_TYPE,
|
||||
ASM_RTAC_APR_CAL_TYPE,
|
||||
VOICE_RTAC_APR_CAL_TYPE,
|
||||
|
||||
MAD_CAL_TYPE,
|
||||
ULP_AFE_CAL_TYPE,
|
||||
ULP_LSM_CAL_TYPE,
|
||||
|
||||
DTS_EAGLE_CAL_TYPE,
|
||||
AUDIO_CORE_METAINFO_CAL_TYPE,
|
||||
SRS_TRUMEDIA_CAL_TYPE,
|
||||
|
||||
ADM_RTAC_AUDVOL_CAL_TYPE,
|
||||
MAX_CAL_TYPES,
|
||||
};
|
||||
|
||||
enum {
|
||||
VERSION_0_0,
|
||||
};
|
||||
|
||||
enum {
|
||||
PER_VOCODER_CAL_BIT_MASK = 0x10000,
|
||||
};
|
||||
|
||||
#define MAX_IOCTL_CMD_SIZE 512
|
||||
|
||||
/* common structures */
|
||||
|
||||
struct audio_cal_header {
|
||||
int32_t data_size;
|
||||
int32_t version;
|
||||
int32_t cal_type;
|
||||
int32_t cal_type_size;
|
||||
};
|
||||
|
||||
struct audio_cal_type_header {
|
||||
int32_t version;
|
||||
int32_t buffer_number;
|
||||
};
|
||||
|
||||
struct audio_cal_data {
|
||||
/* Size of cal data at mem_handle allocation or at vaddr */
|
||||
int32_t cal_size;
|
||||
/* If mem_handle if shared memory is used*/
|
||||
int32_t mem_handle;
|
||||
/* size of virtual memory if shared memory not used */
|
||||
};
|
||||
|
||||
|
||||
/* AUDIO_ALLOCATE_CALIBRATION */
|
||||
struct audio_cal_type_alloc {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
};
|
||||
|
||||
struct audio_cal_alloc {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_alloc cal_type;
|
||||
};
|
||||
|
||||
|
||||
/* AUDIO_DEALLOCATE_CALIBRATION */
|
||||
struct audio_cal_type_dealloc {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
};
|
||||
|
||||
struct audio_cal_dealloc {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_dealloc cal_type;
|
||||
};
|
||||
|
||||
|
||||
/* AUDIO_PREPARE_CALIBRATION */
|
||||
struct audio_cal_type_prepare {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
};
|
||||
|
||||
struct audio_cal_prepare {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_prepare cal_type;
|
||||
};
|
||||
|
||||
|
||||
/* AUDIO_POST_CALIBRATION */
|
||||
struct audio_cal_type_post {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
};
|
||||
|
||||
struct audio_cal_post {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_post cal_type;
|
||||
};
|
||||
|
||||
/*AUDIO_CORE_META_INFO */
|
||||
|
||||
struct audio_cal_info_metainfo {
|
||||
uint32_t nKey;
|
||||
};
|
||||
|
||||
/* Cal info types */
|
||||
enum {
|
||||
RX_DEVICE,
|
||||
TX_DEVICE,
|
||||
MAX_PATH_TYPE
|
||||
};
|
||||
|
||||
struct audio_cal_info_adm_top {
|
||||
int32_t topology;
|
||||
int32_t acdb_id;
|
||||
/* RX_DEVICE or TX_DEVICE */
|
||||
int32_t path;
|
||||
int32_t app_type;
|
||||
int32_t sample_rate;
|
||||
};
|
||||
|
||||
struct audio_cal_info_audproc {
|
||||
int32_t acdb_id;
|
||||
/* RX_DEVICE or TX_DEVICE */
|
||||
int32_t path;
|
||||
int32_t app_type;
|
||||
int32_t sample_rate;
|
||||
};
|
||||
|
||||
struct audio_cal_info_audvol {
|
||||
int32_t acdb_id;
|
||||
/* RX_DEVICE or TX_DEVICE */
|
||||
int32_t path;
|
||||
int32_t app_type;
|
||||
int32_t vol_index;
|
||||
};
|
||||
|
||||
struct audio_cal_info_afe {
|
||||
int32_t acdb_id;
|
||||
/* RX_DEVICE or TX_DEVICE */
|
||||
int32_t path;
|
||||
int32_t sample_rate;
|
||||
};
|
||||
|
||||
struct audio_cal_info_afe_top {
|
||||
int32_t topology;
|
||||
int32_t acdb_id;
|
||||
/* RX_DEVICE or TX_DEVICE */
|
||||
int32_t path;
|
||||
int32_t sample_rate;
|
||||
};
|
||||
|
||||
struct audio_cal_info_asm_top {
|
||||
int32_t topology;
|
||||
int32_t app_type;
|
||||
};
|
||||
|
||||
struct audio_cal_info_audstrm {
|
||||
int32_t app_type;
|
||||
};
|
||||
|
||||
struct audio_cal_info_aanc {
|
||||
int32_t acdb_id;
|
||||
};
|
||||
|
||||
#define MAX_HW_DELAY_ENTRIES 25
|
||||
|
||||
struct audio_cal_hw_delay_entry {
|
||||
uint32_t sample_rate;
|
||||
uint32_t delay_usec;
|
||||
};
|
||||
|
||||
struct audio_cal_hw_delay_data {
|
||||
uint32_t num_entries;
|
||||
struct audio_cal_hw_delay_entry entry[MAX_HW_DELAY_ENTRIES];
|
||||
};
|
||||
|
||||
struct audio_cal_info_hw_delay {
|
||||
int32_t acdb_id;
|
||||
/* RX_DEVICE or TX_DEVICE */
|
||||
int32_t path;
|
||||
int32_t property_type;
|
||||
struct audio_cal_hw_delay_data data;
|
||||
};
|
||||
|
||||
enum msm_spkr_prot_states {
|
||||
MSM_SPKR_PROT_CALIBRATED,
|
||||
MSM_SPKR_PROT_CALIBRATION_IN_PROGRESS,
|
||||
MSM_SPKR_PROT_DISABLED,
|
||||
MSM_SPKR_PROT_NOT_CALIBRATED,
|
||||
MSM_SPKR_PROT_PRE_CALIBRATED,
|
||||
};
|
||||
|
||||
enum msm_spkr_count {
|
||||
SP_V2_SPKR_1,
|
||||
SP_V2_SPKR_2,
|
||||
SP_V2_NUM_MAX_SPKRS
|
||||
};
|
||||
|
||||
struct audio_cal_info_spk_prot_cfg {
|
||||
int32_t r0[SP_V2_NUM_MAX_SPKRS];
|
||||
int32_t t0[SP_V2_NUM_MAX_SPKRS];
|
||||
uint32_t quick_calib_flag;
|
||||
uint32_t mode; /*0 - Start spk prot
|
||||
1 - Start calib
|
||||
2 - Disable spk prot*/
|
||||
};
|
||||
|
||||
struct audio_cal_info_msm_spk_prot_status {
|
||||
int32_t r0[SP_V2_NUM_MAX_SPKRS];
|
||||
int32_t status;
|
||||
};
|
||||
|
||||
struct audio_cal_info_sidetone {
|
||||
uint16_t enable;
|
||||
uint16_t gain;
|
||||
int32_t tx_acdb_id;
|
||||
int32_t rx_acdb_id;
|
||||
int32_t mid;
|
||||
int32_t pid;
|
||||
};
|
||||
|
||||
struct audio_cal_info_lsm_top {
|
||||
int32_t topology;
|
||||
int32_t acdb_id;
|
||||
int32_t app_type;
|
||||
};
|
||||
|
||||
|
||||
struct audio_cal_info_lsm {
|
||||
int32_t acdb_id;
|
||||
/* RX_DEVICE or TX_DEVICE */
|
||||
int32_t path;
|
||||
int32_t app_type;
|
||||
};
|
||||
|
||||
struct audio_cal_info_voc_top {
|
||||
int32_t topology;
|
||||
int32_t acdb_id;
|
||||
};
|
||||
|
||||
struct audio_cal_info_vocproc {
|
||||
int32_t tx_acdb_id;
|
||||
int32_t rx_acdb_id;
|
||||
int32_t tx_sample_rate;
|
||||
int32_t rx_sample_rate;
|
||||
};
|
||||
|
||||
enum {
|
||||
DEFAULT_FEATURE_SET,
|
||||
VOL_BOOST_FEATURE_SET,
|
||||
};
|
||||
|
||||
struct audio_cal_info_vocvol {
|
||||
int32_t tx_acdb_id;
|
||||
int32_t rx_acdb_id;
|
||||
/* DEFUALT_ or VOL_BOOST_FEATURE_SET */
|
||||
int32_t feature_set;
|
||||
};
|
||||
|
||||
struct audio_cal_info_vocdev_cfg {
|
||||
int32_t tx_acdb_id;
|
||||
int32_t rx_acdb_id;
|
||||
};
|
||||
|
||||
#define MAX_VOICE_COLUMNS 20
|
||||
|
||||
union audio_cal_col_na {
|
||||
uint8_t val8;
|
||||
uint16_t val16;
|
||||
uint32_t val32;
|
||||
uint64_t val64;
|
||||
} __packed;
|
||||
|
||||
struct audio_cal_col {
|
||||
uint32_t id;
|
||||
uint32_t type;
|
||||
union audio_cal_col_na na_value;
|
||||
} __packed;
|
||||
|
||||
struct audio_cal_col_data {
|
||||
uint32_t num_columns;
|
||||
struct audio_cal_col column[MAX_VOICE_COLUMNS];
|
||||
} __packed;
|
||||
|
||||
struct audio_cal_info_voc_col {
|
||||
int32_t table_id;
|
||||
int32_t tx_acdb_id;
|
||||
int32_t rx_acdb_id;
|
||||
struct audio_cal_col_data data;
|
||||
};
|
||||
|
||||
/* AUDIO_SET_CALIBRATION & */
|
||||
struct audio_cal_type_basic {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
};
|
||||
|
||||
struct audio_cal_basic {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_basic cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_adm_top {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_adm_top cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_adm_top {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_adm_top cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_metainfo {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_metainfo cal_info;
|
||||
};
|
||||
|
||||
struct audio_core_metainfo {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_metainfo cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_audproc {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_audproc cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_audproc {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_audproc cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_audvol {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_audvol cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_audvol {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_audvol cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_asm_top {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_asm_top cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_asm_top {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_asm_top cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_audstrm {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_audstrm cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_audstrm {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_audstrm cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_afe {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_afe cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_afe {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_afe cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_afe_top {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_afe_top cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_afe_top {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_afe_top cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_aanc {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_aanc cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_aanc {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_aanc cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_fb_spk_prot_cfg {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_spk_prot_cfg cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_fb_spk_prot_cfg {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_fb_spk_prot_cfg cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_hw_delay {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_hw_delay cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_hw_delay {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_hw_delay cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_sidetone {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_sidetone cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_sidetone {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_sidetone cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_lsm_top {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_lsm_top cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_lsm_top {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_lsm_top cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_lsm {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_lsm cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_lsm {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_lsm cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_voc_top {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_voc_top cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_voc_top {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_voc_top cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_vocproc {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_vocproc cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_vocproc {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_vocproc cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_vocvol {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_vocvol cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_vocvol {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_vocvol cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_vocdev_cfg {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_vocdev_cfg cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_vocdev_cfg {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_vocdev_cfg cal_type;
|
||||
};
|
||||
|
||||
struct audio_cal_type_voc_col {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_voc_col cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_voc_col {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_voc_col cal_type;
|
||||
};
|
||||
|
||||
/* AUDIO_GET_CALIBRATION */
|
||||
struct audio_cal_type_fb_spk_prot_status {
|
||||
struct audio_cal_type_header cal_hdr;
|
||||
struct audio_cal_data cal_data;
|
||||
struct audio_cal_info_msm_spk_prot_status cal_info;
|
||||
};
|
||||
|
||||
struct audio_cal_fb_spk_prot_status {
|
||||
struct audio_cal_header hdr;
|
||||
struct audio_cal_type_fb_spk_prot_status cal_type;
|
||||
};
|
||||
|
||||
#endif /* _UAPI_MSM_AUDIO_CALIBRATION_H */
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
#ifndef _UAPI_MSM_AUDIO_WMA_H
|
||||
#define _UAPI_MSM_AUDIO_WMA_H
|
||||
|
||||
#define AUDIO_GET_WMA_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+0), unsigned)
|
||||
#define AUDIO_SET_WMA_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+1), unsigned)
|
||||
|
||||
#define AUDIO_GET_WMA_CONFIG_V2 _IOR(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+2), struct msm_audio_wma_config_v2)
|
||||
#define AUDIO_SET_WMA_CONFIG_V2 _IOW(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+3), struct msm_audio_wma_config_v2)
|
||||
|
||||
struct msm_audio_wma_config {
|
||||
unsigned short armdatareqthr;
|
||||
unsigned short channelsdecoded;
|
||||
unsigned short wmabytespersec;
|
||||
unsigned short wmasamplingfreq;
|
||||
unsigned short wmaencoderopts;
|
||||
};
|
||||
|
||||
struct msm_audio_wma_config_v2 {
|
||||
unsigned short format_tag;
|
||||
unsigned short numchannels;
|
||||
uint32_t samplingrate;
|
||||
uint32_t avgbytespersecond;
|
||||
unsigned short block_align;
|
||||
unsigned short validbitspersample;
|
||||
uint32_t channelmask;
|
||||
unsigned short encodeopt;
|
||||
};
|
||||
|
||||
#endif /* _UAPI_MSM_AUDIO_WMA_H */
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
#ifndef _UAPI_MSM_AUDIO_WMAPRO_H
|
||||
#define _UAPI_MSM_AUDIO_WMAPRO_H
|
||||
|
||||
#define AUDIO_GET_WMAPRO_CONFIG _IOR(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+0), struct msm_audio_wmapro_config)
|
||||
#define AUDIO_SET_WMAPRO_CONFIG _IOW(AUDIO_IOCTL_MAGIC, \
|
||||
(AUDIO_MAX_COMMON_IOCTL_NUM+1), struct msm_audio_wmapro_config)
|
||||
|
||||
struct msm_audio_wmapro_config {
|
||||
unsigned short armdatareqthr;
|
||||
uint8_t validbitspersample;
|
||||
uint8_t numchannels;
|
||||
unsigned short formattag;
|
||||
unsigned short samplingrate;
|
||||
unsigned short avgbytespersecond;
|
||||
unsigned short asfpacketlength;
|
||||
unsigned short channelmask;
|
||||
unsigned short encodeopt;
|
||||
unsigned short advancedencodeopt;
|
||||
uint32_t advancedencodeopt2;
|
||||
};
|
||||
#endif /* _UAPI_MSM_AUDIO_WMAPRO_H */
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
#ifndef _UAPI_DSPS_H_
|
||||
#define _UAPI_DSPS_H_
|
||||
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define DSPS_IOCTL_MAGIC 'd'
|
||||
|
||||
#define DSPS_IOCTL_ON _IO(DSPS_IOCTL_MAGIC, 1)
|
||||
#define DSPS_IOCTL_OFF _IO(DSPS_IOCTL_MAGIC, 2)
|
||||
|
||||
#define DSPS_IOCTL_READ_SLOW_TIMER _IOR(DSPS_IOCTL_MAGIC, 3, unsigned int*)
|
||||
#define DSPS_IOCTL_READ_FAST_TIMER _IOR(DSPS_IOCTL_MAGIC, 4, unsigned int*)
|
||||
|
||||
#define DSPS_IOCTL_RESET _IO(DSPS_IOCTL_MAGIC, 5)
|
||||
|
||||
#endif /* _UAPI_DSPS_H_ */
|
||||
|
|
@ -0,0 +1,181 @@
|
|||
#ifndef _UAPI_MSM_ION_H
|
||||
#define _UAPI_MSM_ION_H
|
||||
|
||||
#include "ion.h"
|
||||
|
||||
enum msm_ion_heap_types {
|
||||
ION_HEAP_TYPE_MSM_START = ION_HEAP_TYPE_CUSTOM + 1,
|
||||
ION_HEAP_TYPE_SECURE_DMA = ION_HEAP_TYPE_MSM_START,
|
||||
ION_HEAP_TYPE_REMOVED,
|
||||
/*
|
||||
* if you add a heap type here you should also add it to
|
||||
* heap_types_info[] in msm_ion.c
|
||||
*/
|
||||
};
|
||||
|
||||
/**
|
||||
* These are the only ids that should be used for Ion heap ids.
|
||||
* The ids listed are the order in which allocation will be attempted
|
||||
* if specified. Don't swap the order of heap ids unless you know what
|
||||
* you are doing!
|
||||
* Id's are spaced by purpose to allow new Id's to be inserted in-between (for
|
||||
* possible fallbacks)
|
||||
*/
|
||||
|
||||
enum ion_heap_ids {
|
||||
INVALID_HEAP_ID = -1,
|
||||
ION_CP_MM_HEAP_ID = 8,
|
||||
ION_CP_MFC_HEAP_ID = 12,
|
||||
ION_CP_WB_HEAP_ID = 16, /* 8660 only */
|
||||
ION_CAMERA_HEAP_ID = 20, /* 8660 only */
|
||||
ION_SYSTEM_CONTIG_HEAP_ID = 21,
|
||||
ION_ADSP_HEAP_ID = 22,
|
||||
ION_PIL1_HEAP_ID = 23, /* Currently used for other PIL images */
|
||||
ION_SF_HEAP_ID = 24,
|
||||
ION_SYSTEM_HEAP_ID = 25,
|
||||
ION_PIL2_HEAP_ID = 26, /* Currently used for modem firmware images */
|
||||
ION_QSECOM_HEAP_ID = 27,
|
||||
ION_AUDIO_HEAP_ID = 28,
|
||||
|
||||
ION_MM_FIRMWARE_HEAP_ID = 29,
|
||||
|
||||
ION_HEAP_ID_RESERVED = 31 /** Bit reserved for ION_FLAG_SECURE flag */
|
||||
};
|
||||
|
||||
/*
|
||||
* The IOMMU heap is deprecated! Here are some aliases for backwards
|
||||
* compatibility:
|
||||
*/
|
||||
#define ION_IOMMU_HEAP_ID ION_SYSTEM_HEAP_ID
|
||||
#define ION_HEAP_TYPE_IOMMU ION_HEAP_TYPE_SYSTEM
|
||||
|
||||
enum ion_fixed_position {
|
||||
NOT_FIXED,
|
||||
FIXED_LOW,
|
||||
FIXED_MIDDLE,
|
||||
FIXED_HIGH,
|
||||
};
|
||||
|
||||
enum cp_mem_usage {
|
||||
VIDEO_BITSTREAM = 0x1,
|
||||
VIDEO_PIXEL = 0x2,
|
||||
VIDEO_NONPIXEL = 0x3,
|
||||
DISPLAY_SECURE_CP_USAGE = 0x4,
|
||||
CAMERA_SECURE_CP_USAGE = 0x5,
|
||||
MAX_USAGE = 0x6,
|
||||
UNKNOWN = 0x7FFFFFFF,
|
||||
};
|
||||
|
||||
/**
|
||||
* Flag to allow non continguous allocation of memory from secure
|
||||
* heap
|
||||
*/
|
||||
#define ION_FLAG_ALLOW_NON_CONTIG (1 << 24)
|
||||
|
||||
/**
|
||||
* Flag to use when allocating to indicate that a heap is secure.
|
||||
*/
|
||||
#define ION_FLAG_SECURE (1 << ION_HEAP_ID_RESERVED)
|
||||
|
||||
/**
|
||||
* Flag for clients to force contiguous memort allocation
|
||||
*
|
||||
* Use of this flag is carefully monitored!
|
||||
*/
|
||||
#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
|
||||
|
||||
/*
|
||||
* Used in conjunction with heap which pool memory to force an allocation
|
||||
* to come from the page allocator directly instead of from the pool allocation
|
||||
*/
|
||||
#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
|
||||
|
||||
/**
|
||||
* Deprecated! Please use the corresponding ION_FLAG_*
|
||||
*/
|
||||
#define ION_SECURE ION_FLAG_SECURE
|
||||
#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS
|
||||
|
||||
/**
|
||||
* Macro should be used with ion_heap_ids defined above.
|
||||
*/
|
||||
#define ION_HEAP(bit) (1 << (bit))
|
||||
|
||||
#define ION_ADSP_HEAP_NAME "adsp"
|
||||
#define ION_SYSTEM_HEAP_NAME "system"
|
||||
#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME
|
||||
#define ION_KMALLOC_HEAP_NAME "kmalloc"
|
||||
#define ION_AUDIO_HEAP_NAME "audio"
|
||||
#define ION_SF_HEAP_NAME "sf"
|
||||
#define ION_MM_HEAP_NAME "mm"
|
||||
#define ION_CAMERA_HEAP_NAME "camera_preview"
|
||||
#define ION_IOMMU_HEAP_NAME "iommu"
|
||||
#define ION_MFC_HEAP_NAME "mfc"
|
||||
#define ION_WB_HEAP_NAME "wb"
|
||||
#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
|
||||
#define ION_PIL1_HEAP_NAME "pil_1"
|
||||
#define ION_PIL2_HEAP_NAME "pil_2"
|
||||
#define ION_QSECOM_HEAP_NAME "qsecom"
|
||||
|
||||
#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED)
|
||||
#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED)
|
||||
|
||||
#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED)
|
||||
|
||||
/* struct ion_flush_data - data passed to ion for flushing caches
|
||||
*
|
||||
* @handle: handle with data to flush
|
||||
* @fd: fd to flush
|
||||
* @vaddr: userspace virtual address mapped with mmap
|
||||
* @offset: offset into the handle to flush
|
||||
* @length: length of handle to flush
|
||||
*
|
||||
* Performs cache operations on the handle. If p is the start address
|
||||
* of the handle, p + offset through p + offset + length will have
|
||||
* the cache operations performed
|
||||
*/
|
||||
struct ion_flush_data {
|
||||
ion_user_handle_t handle;
|
||||
int fd;
|
||||
void *vaddr;
|
||||
unsigned int offset;
|
||||
unsigned int length;
|
||||
};
|
||||
|
||||
|
||||
struct ion_prefetch_data {
|
||||
int heap_id;
|
||||
unsigned long len;
|
||||
};
|
||||
|
||||
#define ION_IOC_MSM_MAGIC 'M'
|
||||
|
||||
/**
|
||||
* DOC: ION_IOC_CLEAN_CACHES - clean the caches
|
||||
*
|
||||
* Clean the caches of the handle specified.
|
||||
*/
|
||||
#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, \
|
||||
struct ion_flush_data)
|
||||
/**
|
||||
* DOC: ION_IOC_INV_CACHES - invalidate the caches
|
||||
*
|
||||
* Invalidate the caches of the handle specified.
|
||||
*/
|
||||
#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, \
|
||||
struct ion_flush_data)
|
||||
/**
|
||||
* DOC: ION_IOC_CLEAN_INV_CACHES - clean and invalidate the caches
|
||||
*
|
||||
* Clean and invalidate the caches of the handle specified.
|
||||
*/
|
||||
#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, \
|
||||
struct ion_flush_data)
|
||||
|
||||
#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, \
|
||||
struct ion_prefetch_data)
|
||||
|
||||
#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, \
|
||||
struct ion_prefetch_data)
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,147 @@
|
|||
#ifndef _UAPI_MSM_RMNET_H_
|
||||
#define _UAPI_MSM_RMNET_H_
|
||||
|
||||
/* Bitmap macros for RmNET driver operation mode. */
|
||||
#define RMNET_MODE_NONE (0x00)
|
||||
#define RMNET_MODE_LLP_ETH (0x01)
|
||||
#define RMNET_MODE_LLP_IP (0x02)
|
||||
#define RMNET_MODE_QOS (0x04)
|
||||
#define RMNET_MODE_MASK (RMNET_MODE_LLP_ETH | \
|
||||
RMNET_MODE_LLP_IP | \
|
||||
RMNET_MODE_QOS)
|
||||
|
||||
#define RMNET_IS_MODE_QOS(mode) \
|
||||
((mode & RMNET_MODE_QOS) == RMNET_MODE_QOS)
|
||||
#define RMNET_IS_MODE_IP(mode) \
|
||||
((mode & RMNET_MODE_LLP_IP) == RMNET_MODE_LLP_IP)
|
||||
|
||||
/* IOCTL command enum
|
||||
* Values chosen to not conflict with other drivers in the ecosystem */
|
||||
enum rmnet_ioctl_cmds_e {
|
||||
RMNET_IOCTL_SET_LLP_ETHERNET = 0x000089F1, /* Set Ethernet protocol */
|
||||
RMNET_IOCTL_SET_LLP_IP = 0x000089F2, /* Set RAWIP protocol */
|
||||
RMNET_IOCTL_GET_LLP = 0x000089F3, /* Get link protocol */
|
||||
RMNET_IOCTL_SET_QOS_ENABLE = 0x000089F4, /* Set QoS header enabled */
|
||||
RMNET_IOCTL_SET_QOS_DISABLE = 0x000089F5, /* Set QoS header disabled*/
|
||||
RMNET_IOCTL_GET_QOS = 0x000089F6, /* Get QoS header state */
|
||||
RMNET_IOCTL_GET_OPMODE = 0x000089F7, /* Get operation mode */
|
||||
RMNET_IOCTL_OPEN = 0x000089F8, /* Open transport port */
|
||||
RMNET_IOCTL_CLOSE = 0x000089F9, /* Close transport port */
|
||||
RMNET_IOCTL_FLOW_ENABLE = 0x000089FA, /* Flow enable */
|
||||
RMNET_IOCTL_FLOW_DISABLE = 0x000089FB, /* Flow disable */
|
||||
RMNET_IOCTL_FLOW_SET_HNDL = 0x000089FC, /* Set flow handle */
|
||||
RMNET_IOCTL_EXTENDED = 0x000089FD, /* Extended IOCTLs */
|
||||
RMNET_IOCTL_MAX
|
||||
};
|
||||
|
||||
enum rmnet_ioctl_extended_cmds_e {
|
||||
/* RmNet Data Required IOCTLs */
|
||||
RMNET_IOCTL_GET_SUPPORTED_FEATURES = 0x0000, /* Get features */
|
||||
RMNET_IOCTL_SET_MRU = 0x0001, /* Set MRU */
|
||||
RMNET_IOCTL_GET_MRU = 0x0002, /* Get MRU */
|
||||
RMNET_IOCTL_GET_EPID = 0x0003, /* Get endpoint ID */
|
||||
RMNET_IOCTL_GET_DRIVER_NAME = 0x0004, /* Get driver name */
|
||||
RMNET_IOCTL_ADD_MUX_CHANNEL = 0x0005, /* Add MUX ID */
|
||||
RMNET_IOCTL_SET_EGRESS_DATA_FORMAT = 0x0006, /* Set EDF */
|
||||
RMNET_IOCTL_SET_INGRESS_DATA_FORMAT = 0x0007, /* Set IDF */
|
||||
RMNET_IOCTL_SET_AGGREGATION_COUNT = 0x0008, /* Set agg count */
|
||||
RMNET_IOCTL_GET_AGGREGATION_COUNT = 0x0009, /* Get agg count */
|
||||
RMNET_IOCTL_SET_AGGREGATION_SIZE = 0x000A, /* Set agg size */
|
||||
RMNET_IOCTL_GET_AGGREGATION_SIZE = 0x000B, /* Get agg size */
|
||||
RMNET_IOCTL_FLOW_CONTROL = 0x000C, /* Do flow control */
|
||||
RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL = 0x000D, /* For legacy use */
|
||||
RMNET_IOCTL_GET_HWSW_MAP = 0x000E, /* Get HW/SW map */
|
||||
RMNET_IOCTL_SET_RX_HEADROOM = 0x000F, /* RX Headroom */
|
||||
RMNET_IOCTL_GET_EP_PAIR = 0x0010, /* Endpoint pair */
|
||||
RMNET_IOCTL_SET_QOS_VERSION = 0x0011, /* 8/6 byte QoS hdr*/
|
||||
RMNET_IOCTL_GET_QOS_VERSION = 0x0012, /* 8/6 byte QoS hdr*/
|
||||
RMNET_IOCTL_GET_SUPPORTED_QOS_MODES = 0x0013, /* Get QoS modes */
|
||||
RMNET_IOCTL_SET_SLEEP_STATE = 0x0014, /* Set sleep state */
|
||||
RMNET_IOCTL_SET_XLAT_DEV_INFO = 0x0015, /* xlat dev name */
|
||||
RMNET_IOCTL_EXTENDED_MAX = 0x0016
|
||||
};
|
||||
|
||||
/* Return values for the RMNET_IOCTL_GET_SUPPORTED_FEATURES IOCTL */
|
||||
#define RMNET_IOCTL_FEAT_NOTIFY_MUX_CHANNEL (1<<0)
|
||||
#define RMNET_IOCTL_FEAT_SET_EGRESS_DATA_FORMAT (1<<1)
|
||||
#define RMNET_IOCTL_FEAT_SET_INGRESS_DATA_FORMAT (1<<2)
|
||||
#define RMNET_IOCTL_FEAT_SET_AGGREGATION_COUNT (1<<3)
|
||||
#define RMNET_IOCTL_FEAT_GET_AGGREGATION_COUNT (1<<4)
|
||||
#define RMNET_IOCTL_FEAT_SET_AGGREGATION_SIZE (1<<5)
|
||||
#define RMNET_IOCTL_FEAT_GET_AGGREGATION_SIZE (1<<6)
|
||||
#define RMNET_IOCTL_FEAT_FLOW_CONTROL (1<<7)
|
||||
#define RMNET_IOCTL_FEAT_GET_DFLT_CONTROL_CHANNEL (1<<8)
|
||||
#define RMNET_IOCTL_FEAT_GET_HWSW_MAP (1<<9)
|
||||
|
||||
/* Input values for the RMNET_IOCTL_SET_EGRESS_DATA_FORMAT IOCTL */
|
||||
#define RMNET_IOCTL_EGRESS_FORMAT_MAP (1<<1)
|
||||
#define RMNET_IOCTL_EGRESS_FORMAT_AGGREGATION (1<<2)
|
||||
#define RMNET_IOCTL_EGRESS_FORMAT_MUXING (1<<3)
|
||||
#define RMNET_IOCTL_EGRESS_FORMAT_CHECKSUM (1<<4)
|
||||
|
||||
/* Input values for the RMNET_IOCTL_SET_INGRESS_DATA_FORMAT IOCTL */
|
||||
#define RMNET_IOCTL_INGRESS_FORMAT_MAP (1<<1)
|
||||
#define RMNET_IOCTL_INGRESS_FORMAT_DEAGGREGATION (1<<2)
|
||||
#define RMNET_IOCTL_INGRESS_FORMAT_DEMUXING (1<<3)
|
||||
#define RMNET_IOCTL_INGRESS_FORMAT_CHECKSUM (1<<4)
|
||||
|
||||
/* User space may not have this defined. */
|
||||
#ifndef IFNAMSIZ
|
||||
#define IFNAMSIZ 16
|
||||
#endif
|
||||
|
||||
struct rmnet_ioctl_extended_s {
|
||||
uint32_t extended_ioctl;
|
||||
union {
|
||||
uint32_t data; /* Generic data field for most extended IOCTLs */
|
||||
|
||||
/* Return values for
|
||||
* RMNET_IOCTL_GET_DRIVER_NAME
|
||||
* RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL */
|
||||
int8_t if_name[IFNAMSIZ];
|
||||
|
||||
/* Input values for the RMNET_IOCTL_ADD_MUX_CHANNEL IOCTL */
|
||||
struct {
|
||||
uint32_t mux_id;
|
||||
int8_t vchannel_name[IFNAMSIZ];
|
||||
} rmnet_mux_val;
|
||||
|
||||
/* Input values for the RMNET_IOCTL_FLOW_CONTROL IOCTL */
|
||||
struct {
|
||||
uint8_t flow_mode;
|
||||
uint8_t mux_id;
|
||||
} flow_control_prop;
|
||||
|
||||
/* Return values for RMNET_IOCTL_GET_EP_PAIR */
|
||||
struct {
|
||||
uint32_t consumer_pipe_num;
|
||||
uint32_t producer_pipe_num;
|
||||
} ipa_ep_pair;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct rmnet_ioctl_data_s {
|
||||
union {
|
||||
uint32_t operation_mode;
|
||||
uint32_t tcm_handle;
|
||||
} u;
|
||||
};
|
||||
|
||||
#define RMNET_IOCTL_QOS_MODE_6 (1<<0)
|
||||
#define RMNET_IOCTL_QOS_MODE_8 (1<<1)
|
||||
|
||||
/* QMI QoS header definition */
|
||||
#define QMI_QOS_HDR_S __attribute((__packed__)) qmi_qos_hdr_s
|
||||
struct QMI_QOS_HDR_S {
|
||||
unsigned char version;
|
||||
unsigned char flags;
|
||||
uint32_t flow_id;
|
||||
};
|
||||
|
||||
/* QMI QoS 8-byte header. */
|
||||
struct qmi_qos_hdr8_s {
|
||||
struct QMI_QOS_HDR_S hdr;
|
||||
uint8_t reserved[2];
|
||||
} __attribute((__packed__));
|
||||
|
||||
#endif /* _UAPI_MSM_RMNET_H_ */
|
||||
|
|
@ -0,0 +1,62 @@
|
|||
#ifndef _UAPI__MSM_ROTATOR_H__
|
||||
#define _UAPI__MSM_ROTATOR_H__
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/msm_mdp.h>
|
||||
|
||||
#define MSM_ROTATOR_IOCTL_MAGIC 'R'
|
||||
|
||||
#define MSM_ROTATOR_IOCTL_START \
|
||||
_IOWR(MSM_ROTATOR_IOCTL_MAGIC, 1, struct msm_rotator_img_info)
|
||||
#define MSM_ROTATOR_IOCTL_ROTATE \
|
||||
_IOW(MSM_ROTATOR_IOCTL_MAGIC, 2, struct msm_rotator_data_info)
|
||||
#define MSM_ROTATOR_IOCTL_FINISH \
|
||||
_IOW(MSM_ROTATOR_IOCTL_MAGIC, 3, int)
|
||||
|
||||
#define ROTATOR_VERSION_01 0xA5B4C301
|
||||
|
||||
enum rotator_clk_type {
|
||||
ROTATOR_CORE_CLK,
|
||||
ROTATOR_PCLK,
|
||||
ROTATOR_IMEM_CLK
|
||||
};
|
||||
|
||||
struct msm_rotator_img_info {
|
||||
unsigned int session_id;
|
||||
struct msmfb_img src;
|
||||
struct msmfb_img dst;
|
||||
struct mdp_rect src_rect;
|
||||
unsigned int dst_x;
|
||||
unsigned int dst_y;
|
||||
unsigned char rotations;
|
||||
int enable;
|
||||
unsigned int downscale_ratio;
|
||||
unsigned int secure;
|
||||
};
|
||||
|
||||
struct msm_rotator_data_info {
|
||||
int session_id;
|
||||
struct msmfb_data src;
|
||||
struct msmfb_data dst;
|
||||
unsigned int version_key;
|
||||
struct msmfb_data src_chroma;
|
||||
struct msmfb_data dst_chroma;
|
||||
};
|
||||
|
||||
struct msm_rot_clocks {
|
||||
const char *clk_name;
|
||||
enum rotator_clk_type clk_type;
|
||||
unsigned int clk_rate;
|
||||
};
|
||||
|
||||
struct msm_rotator_platform_data {
|
||||
unsigned int number_of_clocks;
|
||||
unsigned int hardware_version_number;
|
||||
struct msm_rot_clocks *rotator_clks;
|
||||
#ifdef CONFIG_MSM_BUS_SCALING
|
||||
struct msm_bus_scale_pdata *bus_scale_table;
|
||||
#endif
|
||||
char rot_iommu_split_domain;
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,97 @@
|
|||
#ifndef _MSM_THERMAL_IOCTL_H
|
||||
#define _MSM_THERMAL_IOCTL_H
|
||||
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define MSM_THERMAL_IOCTL_NAME "msm_thermal_query"
|
||||
#define MSM_IOCTL_FREQ_SIZE 16
|
||||
|
||||
struct __attribute__((__packed__)) cpu_freq_arg {
|
||||
uint32_t cpu_num;
|
||||
uint32_t freq_req;
|
||||
};
|
||||
|
||||
struct __attribute__((__packed__)) clock_plan_arg {
|
||||
uint32_t cluster_num;
|
||||
/*
|
||||
** A value of zero for freq_table_len, will fetch the length of the
|
||||
** cluster frequency table. A non-zero value will fetch the frequency
|
||||
** table contents.
|
||||
*/
|
||||
uint32_t freq_table_len;
|
||||
/*
|
||||
** For clusters with frequency table length greater than
|
||||
** MSM_IOCTL_FREQ_SIZE, the frequency table is fetched from kernel
|
||||
** in multiple sets or iterations. The set_idx variable,
|
||||
** indicates, which set/part of frequency table the user is requesting.
|
||||
** The set index value starts from zero. A set index value of 'Z',
|
||||
** will fetch MSM_IOCTL_FREQ_SIZE or maximum available number of
|
||||
** frequency values (if it is less than MSM_IOCTL_FREQ_SIZE)
|
||||
** from the frequency table, starting from the index
|
||||
** (Z * MSM_IOCTL_FREQ_SIZE).
|
||||
** For example, in a device supporting 19 different frequencies, a set
|
||||
** index value of 0 will fetch the first 16 (MSM_IOCTL_FREQ_SIZE)
|
||||
** frequencies starting from the index 0 and a set value of 1 will fetch
|
||||
** the remaining 3 frequencies starting from the index 16.
|
||||
** A successful get, will populate the freq_table_len with the
|
||||
** number of frequency table entries fetched.
|
||||
*/
|
||||
uint32_t set_idx;
|
||||
unsigned int freq_table[MSM_IOCTL_FREQ_SIZE];
|
||||
};
|
||||
|
||||
struct __attribute__((__packed__)) voltage_plan_arg {
|
||||
uint32_t cluster_num;
|
||||
uint32_t voltage_table_len;
|
||||
uint32_t set_idx;
|
||||
uint32_t voltage_table[MSM_IOCTL_FREQ_SIZE];
|
||||
};
|
||||
|
||||
struct __attribute__((__packed__)) msm_thermal_ioctl {
|
||||
uint32_t size;
|
||||
union {
|
||||
struct cpu_freq_arg cpu_freq;
|
||||
struct clock_plan_arg clock_freq;
|
||||
struct voltage_plan_arg voltage;
|
||||
};
|
||||
};
|
||||
|
||||
enum {
|
||||
/*Set CPU Frequency*/
|
||||
MSM_SET_CPU_MAX_FREQ = 0x00,
|
||||
MSM_SET_CPU_MIN_FREQ = 0x01,
|
||||
/*Set cluster frequency*/
|
||||
MSM_SET_CLUSTER_MAX_FREQ = 0x02,
|
||||
MSM_SET_CLUSTER_MIN_FREQ = 0x03,
|
||||
/*Get cluster frequency plan*/
|
||||
MSM_GET_CLUSTER_FREQ_PLAN = 0x04,
|
||||
/*Get cluster voltage plan */
|
||||
MSM_GET_CLUSTER_VOLTAGE_PLAN = 0x05,
|
||||
MSM_CMD_MAX_NR,
|
||||
};
|
||||
|
||||
#define MSM_THERMAL_MAGIC_NUM 0xCA /*Unique magic number*/
|
||||
|
||||
#define MSM_THERMAL_SET_CPU_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
|
||||
MSM_SET_CPU_MAX_FREQ, struct msm_thermal_ioctl)
|
||||
|
||||
#define MSM_THERMAL_SET_CPU_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
|
||||
MSM_SET_CPU_MIN_FREQ, struct msm_thermal_ioctl)
|
||||
|
||||
#define MSM_THERMAL_SET_CLUSTER_MAX_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
|
||||
MSM_SET_CLUSTER_MAX_FREQ, struct msm_thermal_ioctl)
|
||||
|
||||
#define MSM_THERMAL_SET_CLUSTER_MIN_FREQUENCY _IOW(MSM_THERMAL_MAGIC_NUM,\
|
||||
MSM_SET_CLUSTER_MIN_FREQ, struct msm_thermal_ioctl)
|
||||
|
||||
#define MSM_THERMAL_GET_CLUSTER_FREQUENCY_PLAN _IOR(MSM_THERMAL_MAGIC_NUM,\
|
||||
MSM_GET_CLUSTER_FREQ_PLAN, struct msm_thermal_ioctl)
|
||||
|
||||
#define MSM_THERMAL_GET_CLUSTER_VOLTAGE_PLAN _IOR(MSM_THERMAL_MAGIC_NUM,\
|
||||
MSM_GET_CLUSTER_VOLTAGE_PLAN, struct msm_thermal_ioctl)
|
||||
#ifdef __KERNEL__
|
||||
extern int msm_thermal_ioctl_init(void);
|
||||
extern void msm_thermal_ioctl_cleanup(void);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,602 @@
|
|||
#ifndef _UAPI_MSM_VIDC_DEC_H_
|
||||
#define _UAPI_MSM_VIDC_DEC_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
/* STATUS CODES */
|
||||
/* Base value for status codes */
|
||||
#define VDEC_S_BASE 0x40000000
|
||||
/* Success */
|
||||
#define VDEC_S_SUCCESS (VDEC_S_BASE)
|
||||
/* General failure */
|
||||
#define VDEC_S_EFAIL (VDEC_S_BASE + 1)
|
||||
/* Fatal irrecoverable failure. Need to tear down session. */
|
||||
#define VDEC_S_EFATAL (VDEC_S_BASE + 2)
|
||||
/* Error detected in the passed parameters */
|
||||
#define VDEC_S_EBADPARAM (VDEC_S_BASE + 3)
|
||||
/* Command called in invalid state. */
|
||||
#define VDEC_S_EINVALSTATE (VDEC_S_BASE + 4)
|
||||
/* Insufficient OS resources - thread, memory etc. */
|
||||
#define VDEC_S_ENOSWRES (VDEC_S_BASE + 5)
|
||||
/* Insufficient HW resources - core capacity maxed out. */
|
||||
#define VDEC_S_ENOHWRES (VDEC_S_BASE + 6)
|
||||
/* Invalid command called */
|
||||
#define VDEC_S_EINVALCMD (VDEC_S_BASE + 7)
|
||||
/* Command timeout. */
|
||||
#define VDEC_S_ETIMEOUT (VDEC_S_BASE + 8)
|
||||
/* Pre-requirement is not met for API. */
|
||||
#define VDEC_S_ENOPREREQ (VDEC_S_BASE + 9)
|
||||
/* Command queue is full. */
|
||||
#define VDEC_S_ECMDQFULL (VDEC_S_BASE + 10)
|
||||
/* Command is not supported by this driver */
|
||||
#define VDEC_S_ENOTSUPP (VDEC_S_BASE + 11)
|
||||
/* Command is not implemented by thedriver. */
|
||||
#define VDEC_S_ENOTIMPL (VDEC_S_BASE + 12)
|
||||
/* Command is not implemented by the driver. */
|
||||
#define VDEC_S_BUSY (VDEC_S_BASE + 13)
|
||||
#define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14)
|
||||
|
||||
#define VDEC_INTF_VER 1
|
||||
#define VDEC_MSG_BASE 0x0000000
|
||||
/* Codes to identify asynchronous message responses and events that driver
|
||||
wants to communicate to the app.*/
|
||||
#define VDEC_MSG_INVALID (VDEC_MSG_BASE + 0)
|
||||
#define VDEC_MSG_RESP_INPUT_BUFFER_DONE (VDEC_MSG_BASE + 1)
|
||||
#define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE (VDEC_MSG_BASE + 2)
|
||||
#define VDEC_MSG_RESP_INPUT_FLUSHED (VDEC_MSG_BASE + 3)
|
||||
#define VDEC_MSG_RESP_OUTPUT_FLUSHED (VDEC_MSG_BASE + 4)
|
||||
#define VDEC_MSG_RESP_FLUSH_INPUT_DONE (VDEC_MSG_BASE + 5)
|
||||
#define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE (VDEC_MSG_BASE + 6)
|
||||
#define VDEC_MSG_RESP_START_DONE (VDEC_MSG_BASE + 7)
|
||||
#define VDEC_MSG_RESP_STOP_DONE (VDEC_MSG_BASE + 8)
|
||||
#define VDEC_MSG_RESP_PAUSE_DONE (VDEC_MSG_BASE + 9)
|
||||
#define VDEC_MSG_RESP_RESUME_DONE (VDEC_MSG_BASE + 10)
|
||||
#define VDEC_MSG_RESP_RESOURCE_LOADED (VDEC_MSG_BASE + 11)
|
||||
#define VDEC_EVT_RESOURCES_LOST (VDEC_MSG_BASE + 12)
|
||||
#define VDEC_MSG_EVT_CONFIG_CHANGED (VDEC_MSG_BASE + 13)
|
||||
#define VDEC_MSG_EVT_HW_ERROR (VDEC_MSG_BASE + 14)
|
||||
#define VDEC_MSG_EVT_INFO_CONFIG_CHANGED (VDEC_MSG_BASE + 15)
|
||||
#define VDEC_MSG_EVT_INFO_FIELD_DROPPED (VDEC_MSG_BASE + 16)
|
||||
#define VDEC_MSG_EVT_HW_OVERLOAD (VDEC_MSG_BASE + 17)
|
||||
#define VDEC_MSG_EVT_MAX_CLIENTS (VDEC_MSG_BASE + 18)
|
||||
#define VDEC_MSG_EVT_HW_UNSUPPORTED (VDEC_MSG_BASE + 19)
|
||||
|
||||
/*Buffer flags bits masks.*/
|
||||
#define VDEC_BUFFERFLAG_EOS 0x00000001
|
||||
#define VDEC_BUFFERFLAG_DECODEONLY 0x00000004
|
||||
#define VDEC_BUFFERFLAG_DATACORRUPT 0x00000008
|
||||
#define VDEC_BUFFERFLAG_ENDOFFRAME 0x00000010
|
||||
#define VDEC_BUFFERFLAG_SYNCFRAME 0x00000020
|
||||
#define VDEC_BUFFERFLAG_EXTRADATA 0x00000040
|
||||
#define VDEC_BUFFERFLAG_CODECCONFIG 0x00000080
|
||||
|
||||
/*Post processing flags bit masks*/
|
||||
#define VDEC_EXTRADATA_NONE 0x001
|
||||
#define VDEC_EXTRADATA_QP 0x004
|
||||
#define VDEC_EXTRADATA_MB_ERROR_MAP 0x008
|
||||
#define VDEC_EXTRADATA_SEI 0x010
|
||||
#define VDEC_EXTRADATA_VUI 0x020
|
||||
#define VDEC_EXTRADATA_VC1 0x040
|
||||
|
||||
#define VDEC_EXTRADATA_EXT_DATA 0x0800
|
||||
#define VDEC_EXTRADATA_USER_DATA 0x1000
|
||||
#define VDEC_EXTRADATA_EXT_BUFFER 0x2000
|
||||
|
||||
#define VDEC_CMDBASE 0x800
|
||||
#define VDEC_CMD_SET_INTF_VERSION (VDEC_CMDBASE)
|
||||
|
||||
#define VDEC_IOCTL_MAGIC 'v'
|
||||
|
||||
struct vdec_ioctl_msg {
|
||||
void __user *in;
|
||||
void __user *out;
|
||||
};
|
||||
|
||||
/* CMD params: InputParam:enum vdec_codec
|
||||
OutputParam: struct vdec_profile_level*/
|
||||
#define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \
|
||||
_IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg)
|
||||
|
||||
/*CMD params:InputParam: NULL
|
||||
OutputParam: uint32_t(bitmask)*/
|
||||
#define VDEC_IOCTL_GET_INTERLACE_FORMAT \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg)
|
||||
|
||||
/* CMD params: InputParam: enum vdec_codec
|
||||
OutputParam: struct vdec_profile_level*/
|
||||
#define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \
|
||||
_IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg)
|
||||
|
||||
/*CMD params: SET: InputParam: enum vdec_output_fromat OutputParam: NULL
|
||||
GET: InputParam: NULL OutputParam: enum vdec_output_fromat*/
|
||||
#define VDEC_IOCTL_SET_OUTPUT_FORMAT \
|
||||
_IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg)
|
||||
#define VDEC_IOCTL_GET_OUTPUT_FORMAT \
|
||||
_IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg)
|
||||
|
||||
/*CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL
|
||||
GET: InputParam: NULL OutputParam: enum vdec_codec*/
|
||||
#define VDEC_IOCTL_SET_CODEC \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg)
|
||||
#define VDEC_IOCTL_GET_CODEC \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg)
|
||||
|
||||
/*CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL
|
||||
GET: InputParam: NULL outputparam: struct vdec_picsize*/
|
||||
#define VDEC_IOCTL_SET_PICRES \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg)
|
||||
#define VDEC_IOCTL_GET_PICRES \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_EXTRADATA \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg)
|
||||
#define VDEC_IOCTL_GET_EXTRADATA \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_SEQUENCE_HEADER \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg)
|
||||
|
||||
/* CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL
|
||||
GET: InputParam - NULL, OutputParam - vdec_allocatorproperty*/
|
||||
#define VDEC_IOCTL_SET_BUFFER_REQ \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg)
|
||||
#define VDEC_IOCTL_GET_BUFFER_REQ \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg)
|
||||
/* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */
|
||||
#define VDEC_IOCTL_ALLOCATE_BUFFER \
|
||||
_IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg)
|
||||
/* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/
|
||||
#define VDEC_IOCTL_FREE_BUFFER \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg)
|
||||
|
||||
/*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/
|
||||
#define VDEC_IOCTL_SET_BUFFER \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg)
|
||||
|
||||
/* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/
|
||||
#define VDEC_IOCTL_FILL_OUTPUT_BUFFER \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg)
|
||||
|
||||
/*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/
|
||||
#define VDEC_IOCTL_DECODE_FRAME \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19)
|
||||
#define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20)
|
||||
#define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21)
|
||||
#define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22)
|
||||
#define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23)
|
||||
|
||||
/*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */
|
||||
#define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg)
|
||||
|
||||
/* ========================================================
|
||||
* IOCTL for getting asynchronous notification from driver
|
||||
* ========================================================*/
|
||||
|
||||
/*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/
|
||||
#define VDEC_IOCTL_GET_NEXT_MSG \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26)
|
||||
|
||||
#define VDEC_IOCTL_GET_NUMBER_INSTANCES \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_PICTURE_ORDER \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_FRAME_RATE \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_H264_MV_BUFFER \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_FREE_H264_MV_BUFFER \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_GET_MV_BUFFER_SIZE \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_IDR_ONLY_DECODING \
|
||||
_IO(VDEC_IOCTL_MAGIC, 33)
|
||||
|
||||
#define VDEC_IOCTL_SET_CONT_ON_RECONFIG \
|
||||
_IO(VDEC_IOCTL_MAGIC, 34)
|
||||
|
||||
#define VDEC_IOCTL_SET_DISABLE_DMX \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_GET_DISABLE_DMX \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_PERF_CLK \
|
||||
_IOR(VDEC_IOCTL_MAGIC, 38, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_SET_META_BUFFERS \
|
||||
_IOW(VDEC_IOCTL_MAGIC, 39, struct vdec_ioctl_msg)
|
||||
|
||||
#define VDEC_IOCTL_FREE_META_BUFFERS \
|
||||
_IO(VDEC_IOCTL_MAGIC, 40)
|
||||
|
||||
enum vdec_picture {
|
||||
PICTURE_TYPE_I,
|
||||
PICTURE_TYPE_P,
|
||||
PICTURE_TYPE_B,
|
||||
PICTURE_TYPE_BI,
|
||||
PICTURE_TYPE_SKIP,
|
||||
PICTURE_TYPE_IDR,
|
||||
PICTURE_TYPE_UNKNOWN
|
||||
};
|
||||
|
||||
enum vdec_buffer {
|
||||
VDEC_BUFFER_TYPE_INPUT,
|
||||
VDEC_BUFFER_TYPE_OUTPUT
|
||||
};
|
||||
|
||||
struct vdec_allocatorproperty {
|
||||
enum vdec_buffer buffer_type;
|
||||
uint32_t mincount;
|
||||
uint32_t maxcount;
|
||||
uint32_t actualcount;
|
||||
size_t buffer_size;
|
||||
uint32_t alignment;
|
||||
uint32_t buf_poolid;
|
||||
size_t meta_buffer_size;
|
||||
};
|
||||
|
||||
struct vdec_bufferpayload {
|
||||
void __user *bufferaddr;
|
||||
size_t buffer_len;
|
||||
int pmem_fd;
|
||||
size_t offset;
|
||||
size_t mmaped_size;
|
||||
};
|
||||
|
||||
struct vdec_setbuffer_cmd {
|
||||
enum vdec_buffer buffer_type;
|
||||
struct vdec_bufferpayload buffer;
|
||||
};
|
||||
|
||||
struct vdec_fillbuffer_cmd {
|
||||
struct vdec_bufferpayload buffer;
|
||||
void *client_data;
|
||||
};
|
||||
|
||||
enum vdec_bufferflush {
|
||||
VDEC_FLUSH_TYPE_INPUT,
|
||||
VDEC_FLUSH_TYPE_OUTPUT,
|
||||
VDEC_FLUSH_TYPE_ALL
|
||||
};
|
||||
|
||||
enum vdec_codec {
|
||||
VDEC_CODECTYPE_H264 = 0x1,
|
||||
VDEC_CODECTYPE_H263 = 0x2,
|
||||
VDEC_CODECTYPE_MPEG4 = 0x3,
|
||||
VDEC_CODECTYPE_DIVX_3 = 0x4,
|
||||
VDEC_CODECTYPE_DIVX_4 = 0x5,
|
||||
VDEC_CODECTYPE_DIVX_5 = 0x6,
|
||||
VDEC_CODECTYPE_DIVX_6 = 0x7,
|
||||
VDEC_CODECTYPE_XVID = 0x8,
|
||||
VDEC_CODECTYPE_MPEG1 = 0x9,
|
||||
VDEC_CODECTYPE_MPEG2 = 0xa,
|
||||
VDEC_CODECTYPE_VC1 = 0xb,
|
||||
VDEC_CODECTYPE_VC1_RCV = 0xc,
|
||||
VDEC_CODECTYPE_HEVC = 0xd,
|
||||
VDEC_CODECTYPE_MVC = 0xe,
|
||||
};
|
||||
|
||||
enum vdec_mpeg2_profile {
|
||||
VDEC_MPEG2ProfileSimple = 0x1,
|
||||
VDEC_MPEG2ProfileMain = 0x2,
|
||||
VDEC_MPEG2Profile422 = 0x4,
|
||||
VDEC_MPEG2ProfileSNR = 0x8,
|
||||
VDEC_MPEG2ProfileSpatial = 0x10,
|
||||
VDEC_MPEG2ProfileHigh = 0x20,
|
||||
VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000,
|
||||
VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000,
|
||||
VDEC_MPEG2ProfileMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_mpeg2_level {
|
||||
|
||||
VDEC_MPEG2LevelLL = 0x1,
|
||||
VDEC_MPEG2LevelML = 0x2,
|
||||
VDEC_MPEG2LevelH14 = 0x4,
|
||||
VDEC_MPEG2LevelHL = 0x8,
|
||||
VDEC_MPEG2LevelKhronosExtensions = 0x6F000000,
|
||||
VDEC_MPEG2LevelVendorStartUnused = 0x7F000000,
|
||||
VDEC_MPEG2LevelMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_mpeg4_profile {
|
||||
VDEC_MPEG4ProfileSimple = 0x01,
|
||||
VDEC_MPEG4ProfileSimpleScalable = 0x02,
|
||||
VDEC_MPEG4ProfileCore = 0x04,
|
||||
VDEC_MPEG4ProfileMain = 0x08,
|
||||
VDEC_MPEG4ProfileNbit = 0x10,
|
||||
VDEC_MPEG4ProfileScalableTexture = 0x20,
|
||||
VDEC_MPEG4ProfileSimpleFace = 0x40,
|
||||
VDEC_MPEG4ProfileSimpleFBA = 0x80,
|
||||
VDEC_MPEG4ProfileBasicAnimated = 0x100,
|
||||
VDEC_MPEG4ProfileHybrid = 0x200,
|
||||
VDEC_MPEG4ProfileAdvancedRealTime = 0x400,
|
||||
VDEC_MPEG4ProfileCoreScalable = 0x800,
|
||||
VDEC_MPEG4ProfileAdvancedCoding = 0x1000,
|
||||
VDEC_MPEG4ProfileAdvancedCore = 0x2000,
|
||||
VDEC_MPEG4ProfileAdvancedScalable = 0x4000,
|
||||
VDEC_MPEG4ProfileAdvancedSimple = 0x8000,
|
||||
VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000,
|
||||
VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000,
|
||||
VDEC_MPEG4ProfileMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_mpeg4_level {
|
||||
VDEC_MPEG4Level0 = 0x01,
|
||||
VDEC_MPEG4Level0b = 0x02,
|
||||
VDEC_MPEG4Level1 = 0x04,
|
||||
VDEC_MPEG4Level2 = 0x08,
|
||||
VDEC_MPEG4Level3 = 0x10,
|
||||
VDEC_MPEG4Level4 = 0x20,
|
||||
VDEC_MPEG4Level4a = 0x40,
|
||||
VDEC_MPEG4Level5 = 0x80,
|
||||
VDEC_MPEG4LevelKhronosExtensions = 0x6F000000,
|
||||
VDEC_MPEG4LevelVendorStartUnused = 0x7F000000,
|
||||
VDEC_MPEG4LevelMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_avc_profile {
|
||||
VDEC_AVCProfileBaseline = 0x01,
|
||||
VDEC_AVCProfileMain = 0x02,
|
||||
VDEC_AVCProfileExtended = 0x04,
|
||||
VDEC_AVCProfileHigh = 0x08,
|
||||
VDEC_AVCProfileHigh10 = 0x10,
|
||||
VDEC_AVCProfileHigh422 = 0x20,
|
||||
VDEC_AVCProfileHigh444 = 0x40,
|
||||
VDEC_AVCProfileKhronosExtensions = 0x6F000000,
|
||||
VDEC_AVCProfileVendorStartUnused = 0x7F000000,
|
||||
VDEC_AVCProfileMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_avc_level {
|
||||
VDEC_AVCLevel1 = 0x01,
|
||||
VDEC_AVCLevel1b = 0x02,
|
||||
VDEC_AVCLevel11 = 0x04,
|
||||
VDEC_AVCLevel12 = 0x08,
|
||||
VDEC_AVCLevel13 = 0x10,
|
||||
VDEC_AVCLevel2 = 0x20,
|
||||
VDEC_AVCLevel21 = 0x40,
|
||||
VDEC_AVCLevel22 = 0x80,
|
||||
VDEC_AVCLevel3 = 0x100,
|
||||
VDEC_AVCLevel31 = 0x200,
|
||||
VDEC_AVCLevel32 = 0x400,
|
||||
VDEC_AVCLevel4 = 0x800,
|
||||
VDEC_AVCLevel41 = 0x1000,
|
||||
VDEC_AVCLevel42 = 0x2000,
|
||||
VDEC_AVCLevel5 = 0x4000,
|
||||
VDEC_AVCLevel51 = 0x8000,
|
||||
VDEC_AVCLevelKhronosExtensions = 0x6F000000,
|
||||
VDEC_AVCLevelVendorStartUnused = 0x7F000000,
|
||||
VDEC_AVCLevelMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_divx_profile {
|
||||
VDEC_DIVXProfile_qMobile = 0x01,
|
||||
VDEC_DIVXProfile_Mobile = 0x02,
|
||||
VDEC_DIVXProfile_HD = 0x04,
|
||||
VDEC_DIVXProfile_Handheld = 0x08,
|
||||
VDEC_DIVXProfile_Portable = 0x10,
|
||||
VDEC_DIVXProfile_HomeTheater = 0x20
|
||||
};
|
||||
|
||||
enum vdec_xvid_profile {
|
||||
VDEC_XVIDProfile_Simple = 0x1,
|
||||
VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2,
|
||||
VDEC_XVIDProfile_Advanced_Simple = 0x4
|
||||
};
|
||||
|
||||
enum vdec_xvid_level {
|
||||
VDEC_XVID_LEVEL_S_L0 = 0x1,
|
||||
VDEC_XVID_LEVEL_S_L1 = 0x2,
|
||||
VDEC_XVID_LEVEL_S_L2 = 0x4,
|
||||
VDEC_XVID_LEVEL_S_L3 = 0x8,
|
||||
VDEC_XVID_LEVEL_ARTS_L1 = 0x10,
|
||||
VDEC_XVID_LEVEL_ARTS_L2 = 0x20,
|
||||
VDEC_XVID_LEVEL_ARTS_L3 = 0x40,
|
||||
VDEC_XVID_LEVEL_ARTS_L4 = 0x80,
|
||||
VDEC_XVID_LEVEL_AS_L0 = 0x100,
|
||||
VDEC_XVID_LEVEL_AS_L1 = 0x200,
|
||||
VDEC_XVID_LEVEL_AS_L2 = 0x400,
|
||||
VDEC_XVID_LEVEL_AS_L3 = 0x800,
|
||||
VDEC_XVID_LEVEL_AS_L4 = 0x1000
|
||||
};
|
||||
|
||||
enum vdec_h263profile {
|
||||
VDEC_H263ProfileBaseline = 0x01,
|
||||
VDEC_H263ProfileH320Coding = 0x02,
|
||||
VDEC_H263ProfileBackwardCompatible = 0x04,
|
||||
VDEC_H263ProfileISWV2 = 0x08,
|
||||
VDEC_H263ProfileISWV3 = 0x10,
|
||||
VDEC_H263ProfileHighCompression = 0x20,
|
||||
VDEC_H263ProfileInternet = 0x40,
|
||||
VDEC_H263ProfileInterlace = 0x80,
|
||||
VDEC_H263ProfileHighLatency = 0x100,
|
||||
VDEC_H263ProfileKhronosExtensions = 0x6F000000,
|
||||
VDEC_H263ProfileVendorStartUnused = 0x7F000000,
|
||||
VDEC_H263ProfileMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_h263level {
|
||||
VDEC_H263Level10 = 0x01,
|
||||
VDEC_H263Level20 = 0x02,
|
||||
VDEC_H263Level30 = 0x04,
|
||||
VDEC_H263Level40 = 0x08,
|
||||
VDEC_H263Level45 = 0x10,
|
||||
VDEC_H263Level50 = 0x20,
|
||||
VDEC_H263Level60 = 0x40,
|
||||
VDEC_H263Level70 = 0x80,
|
||||
VDEC_H263LevelKhronosExtensions = 0x6F000000,
|
||||
VDEC_H263LevelVendorStartUnused = 0x7F000000,
|
||||
VDEC_H263LevelMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_wmv_format {
|
||||
VDEC_WMVFormatUnused = 0x01,
|
||||
VDEC_WMVFormat7 = 0x02,
|
||||
VDEC_WMVFormat8 = 0x04,
|
||||
VDEC_WMVFormat9 = 0x08,
|
||||
VDEC_WMFFormatKhronosExtensions = 0x6F000000,
|
||||
VDEC_WMFFormatVendorStartUnused = 0x7F000000,
|
||||
VDEC_WMVFormatMax = 0x7FFFFFFF
|
||||
};
|
||||
|
||||
enum vdec_vc1_profile {
|
||||
VDEC_VC1ProfileSimple = 0x1,
|
||||
VDEC_VC1ProfileMain = 0x2,
|
||||
VDEC_VC1ProfileAdvanced = 0x4
|
||||
};
|
||||
|
||||
enum vdec_vc1_level {
|
||||
VDEC_VC1_LEVEL_S_Low = 0x1,
|
||||
VDEC_VC1_LEVEL_S_Medium = 0x2,
|
||||
VDEC_VC1_LEVEL_M_Low = 0x4,
|
||||
VDEC_VC1_LEVEL_M_Medium = 0x8,
|
||||
VDEC_VC1_LEVEL_M_High = 0x10,
|
||||
VDEC_VC1_LEVEL_A_L0 = 0x20,
|
||||
VDEC_VC1_LEVEL_A_L1 = 0x40,
|
||||
VDEC_VC1_LEVEL_A_L2 = 0x80,
|
||||
VDEC_VC1_LEVEL_A_L3 = 0x100,
|
||||
VDEC_VC1_LEVEL_A_L4 = 0x200
|
||||
};
|
||||
|
||||
struct vdec_profile_level {
|
||||
uint32_t profiles;
|
||||
uint32_t levels;
|
||||
};
|
||||
|
||||
enum vdec_interlaced_format {
|
||||
VDEC_InterlaceFrameProgressive = 0x1,
|
||||
VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2,
|
||||
VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4
|
||||
};
|
||||
|
||||
enum vdec_output_fromat {
|
||||
VDEC_YUV_FORMAT_NV12 = 0x1,
|
||||
VDEC_YUV_FORMAT_TILE_4x2 = 0x2
|
||||
};
|
||||
|
||||
enum vdec_output_order {
|
||||
VDEC_ORDER_DISPLAY = 0x1,
|
||||
VDEC_ORDER_DECODE = 0x2
|
||||
};
|
||||
|
||||
struct vdec_picsize {
|
||||
uint32_t frame_width;
|
||||
uint32_t frame_height;
|
||||
uint32_t stride;
|
||||
uint32_t scan_lines;
|
||||
};
|
||||
|
||||
struct vdec_seqheader {
|
||||
void __user *ptr_seqheader;
|
||||
size_t seq_header_len;
|
||||
int pmem_fd;
|
||||
size_t pmem_offset;
|
||||
};
|
||||
|
||||
struct vdec_mberror {
|
||||
void __user *ptr_errormap;
|
||||
size_t err_mapsize;
|
||||
};
|
||||
|
||||
struct vdec_input_frameinfo {
|
||||
void __user *bufferaddr;
|
||||
size_t offset;
|
||||
size_t datalen;
|
||||
uint32_t flags;
|
||||
int64_t timestamp;
|
||||
void *client_data;
|
||||
int pmem_fd;
|
||||
size_t pmem_offset;
|
||||
void __user *desc_addr;
|
||||
uint32_t desc_size;
|
||||
};
|
||||
|
||||
struct vdec_framesize {
|
||||
uint32_t left;
|
||||
uint32_t top;
|
||||
uint32_t right;
|
||||
uint32_t bottom;
|
||||
};
|
||||
|
||||
struct vdec_aspectratioinfo {
|
||||
uint32_t aspect_ratio;
|
||||
uint32_t par_width;
|
||||
uint32_t par_height;
|
||||
};
|
||||
|
||||
struct vdec_sep_metadatainfo {
|
||||
void __user *metabufaddr;
|
||||
uint32_t size;
|
||||
};
|
||||
|
||||
struct vdec_output_frameinfo {
|
||||
void __user *bufferaddr;
|
||||
size_t offset;
|
||||
size_t len;
|
||||
uint32_t flags;
|
||||
int64_t time_stamp;
|
||||
enum vdec_picture pic_type;
|
||||
void *client_data;
|
||||
void *input_frame_clientdata;
|
||||
struct vdec_picsize picsize;
|
||||
struct vdec_framesize framesize;
|
||||
enum vdec_interlaced_format interlaced_format;
|
||||
struct vdec_aspectratioinfo aspect_ratio_info;
|
||||
struct vdec_sep_metadatainfo metadata_info;
|
||||
};
|
||||
|
||||
union vdec_msgdata {
|
||||
struct vdec_output_frameinfo output_frame;
|
||||
void *input_frame_clientdata;
|
||||
};
|
||||
|
||||
struct vdec_msginfo {
|
||||
uint32_t status_code;
|
||||
uint32_t msgcode;
|
||||
union vdec_msgdata msgdata;
|
||||
size_t msgdatasize;
|
||||
};
|
||||
|
||||
struct vdec_framerate {
|
||||
unsigned long fps_denominator;
|
||||
unsigned long fps_numerator;
|
||||
};
|
||||
|
||||
struct vdec_h264_mv{
|
||||
size_t size;
|
||||
int count;
|
||||
int pmem_fd;
|
||||
int offset;
|
||||
};
|
||||
|
||||
struct vdec_mv_buff_size{
|
||||
int width;
|
||||
int height;
|
||||
int size;
|
||||
int alignment;
|
||||
};
|
||||
|
||||
struct vdec_meta_buffers {
|
||||
size_t size;
|
||||
int count;
|
||||
int pmem_fd;
|
||||
int pmem_fd_iommu;
|
||||
int offset;
|
||||
};
|
||||
|
||||
#endif /* end of macro _VDECDECODER_H_ */
|
||||
|
|
@ -0,0 +1,700 @@
|
|||
#ifndef _UAPI_MSM_VIDC_ENC_H_
|
||||
#define _UAPI_MSM_VIDC_ENC_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
/** STATUS CODES*/
|
||||
/* Base value for status codes */
|
||||
#define VEN_S_BASE 0x00000000
|
||||
#define VEN_S_SUCCESS (VEN_S_BASE)/* Success */
|
||||
#define VEN_S_EFAIL (VEN_S_BASE+1)/* General failure */
|
||||
#define VEN_S_EFATAL (VEN_S_BASE+2)/* Fatal irrecoverable failure*/
|
||||
#define VEN_S_EBADPARAM (VEN_S_BASE+3)/* Error passed parameters*/
|
||||
/*Command called in invalid state*/
|
||||
#define VEN_S_EINVALSTATE (VEN_S_BASE+4)
|
||||
#define VEN_S_ENOSWRES (VEN_S_BASE+5)/* Insufficient OS resources*/
|
||||
#define VEN_S_ENOHWRES (VEN_S_BASE+6)/*Insufficient HW resources */
|
||||
#define VEN_S_EBUFFREQ (VEN_S_BASE+7)/* Buffer requirements were not met*/
|
||||
#define VEN_S_EINVALCMD (VEN_S_BASE+8)/* Invalid command called */
|
||||
#define VEN_S_ETIMEOUT (VEN_S_BASE+9)/* Command timeout. */
|
||||
/*Re-attempt was made when multiple invocation not supported for API.*/
|
||||
#define VEN_S_ENOREATMPT (VEN_S_BASE+10)
|
||||
#define VEN_S_ENOPREREQ (VEN_S_BASE+11)/*Pre-requirement is not met for API*/
|
||||
#define VEN_S_ECMDQFULL (VEN_S_BASE+12)/*Command queue is full*/
|
||||
#define VEN_S_ENOTSUPP (VEN_S_BASE+13)/*Command not supported*/
|
||||
#define VEN_S_ENOTIMPL (VEN_S_BASE+14)/*Command not implemented.*/
|
||||
#define VEN_S_ENOTPMEM (VEN_S_BASE+15)/*Buffer is not from PMEM*/
|
||||
#define VEN_S_EFLUSHED (VEN_S_BASE+16)/*returned buffer was flushed*/
|
||||
#define VEN_S_EINSUFBUF (VEN_S_BASE+17)/*provided buffer size insufficient*/
|
||||
#define VEN_S_ESAMESTATE (VEN_S_BASE+18)
|
||||
#define VEN_S_EINVALTRANS (VEN_S_BASE+19)
|
||||
|
||||
#define VEN_INTF_VER 1
|
||||
|
||||
/*Asynchronous messages from driver*/
|
||||
#define VEN_MSG_INDICATION 0
|
||||
#define VEN_MSG_INPUT_BUFFER_DONE 1
|
||||
#define VEN_MSG_OUTPUT_BUFFER_DONE 2
|
||||
#define VEN_MSG_NEED_OUTPUT_BUFFER 3
|
||||
#define VEN_MSG_FLUSH_INPUT_DONE 4
|
||||
#define VEN_MSG_FLUSH_OUPUT_DONE 5
|
||||
#define VEN_MSG_START 6
|
||||
#define VEN_MSG_STOP 7
|
||||
#define VEN_MSG_PAUSE 8
|
||||
#define VEN_MSG_RESUME 9
|
||||
#define VEN_MSG_STOP_READING_MSG 10
|
||||
#define VEN_MSG_LTRUSE_FAILED 11
|
||||
#define VEN_MSG_HW_OVERLOAD 12
|
||||
#define VEN_MSG_MAX_CLIENTS 13
|
||||
|
||||
|
||||
/*Buffer flags bits masks*/
|
||||
#define VEN_BUFFLAG_EOS 0x00000001
|
||||
#define VEN_BUFFLAG_ENDOFFRAME 0x00000010
|
||||
#define VEN_BUFFLAG_SYNCFRAME 0x00000020
|
||||
#define VEN_BUFFLAG_EXTRADATA 0x00000040
|
||||
#define VEN_BUFFLAG_CODECCONFIG 0x00000080
|
||||
|
||||
/*Post processing flags bit masks*/
|
||||
#define VEN_EXTRADATA_NONE 0x001
|
||||
#define VEN_EXTRADATA_QCOMFILLER 0x002
|
||||
#define VEN_EXTRADATA_SLICEINFO 0x100
|
||||
#define VEN_EXTRADATA_LTRINFO 0x200
|
||||
#define VEN_EXTRADATA_MBINFO 0x400
|
||||
|
||||
/*ENCODER CONFIGURATION CONSTANTS*/
|
||||
|
||||
/*Encoded video frame types*/
|
||||
#define VEN_FRAME_TYPE_I 1/* I frame type */
|
||||
#define VEN_FRAME_TYPE_P 2/* P frame type */
|
||||
#define VEN_FRAME_TYPE_B 3/* B frame type */
|
||||
|
||||
/*Video codec types*/
|
||||
#define VEN_CODEC_MPEG4 1/* MPEG4 Codec */
|
||||
#define VEN_CODEC_H264 2/* H.264 Codec */
|
||||
#define VEN_CODEC_H263 3/* H.263 Codec */
|
||||
|
||||
/*Video codec profile types.*/
|
||||
#define VEN_PROFILE_MPEG4_SP 1/* 1 - MPEG4 SP profile */
|
||||
#define VEN_PROFILE_MPEG4_ASP 2/* 2 - MPEG4 ASP profile */
|
||||
#define VEN_PROFILE_H264_BASELINE 3/* 3 - H264 Baseline profile */
|
||||
#define VEN_PROFILE_H264_MAIN 4/* 4 - H264 Main profile */
|
||||
#define VEN_PROFILE_H264_HIGH 5/* 5 - H264 High profile */
|
||||
#define VEN_PROFILE_H263_BASELINE 6/* 6 - H263 Baseline profile */
|
||||
|
||||
/*Video codec profile level types.*/
|
||||
#define VEN_LEVEL_MPEG4_0 0x1/* MPEG4 Level 0 */
|
||||
#define VEN_LEVEL_MPEG4_1 0x2/* MPEG4 Level 1 */
|
||||
#define VEN_LEVEL_MPEG4_2 0x3/* MPEG4 Level 2 */
|
||||
#define VEN_LEVEL_MPEG4_3 0x4/* MPEG4 Level 3 */
|
||||
#define VEN_LEVEL_MPEG4_4 0x5/* MPEG4 Level 4 */
|
||||
#define VEN_LEVEL_MPEG4_5 0x6/* MPEG4 Level 5 */
|
||||
#define VEN_LEVEL_MPEG4_3b 0x7/* MPEG4 Level 3b */
|
||||
#define VEN_LEVEL_MPEG4_6 0x8/* MPEG4 Level 6 */
|
||||
|
||||
#define VEN_LEVEL_H264_1 0x9/* H.264 Level 1 */
|
||||
#define VEN_LEVEL_H264_1b 0xA/* H.264 Level 1b */
|
||||
#define VEN_LEVEL_H264_1p1 0xB/* H.264 Level 1.1 */
|
||||
#define VEN_LEVEL_H264_1p2 0xC/* H.264 Level 1.2 */
|
||||
#define VEN_LEVEL_H264_1p3 0xD/* H.264 Level 1.3 */
|
||||
#define VEN_LEVEL_H264_2 0xE/* H.264 Level 2 */
|
||||
#define VEN_LEVEL_H264_2p1 0xF/* H.264 Level 2.1 */
|
||||
#define VEN_LEVEL_H264_2p2 0x10/* H.264 Level 2.2 */
|
||||
#define VEN_LEVEL_H264_3 0x11/* H.264 Level 3 */
|
||||
#define VEN_LEVEL_H264_3p1 0x12/* H.264 Level 3.1 */
|
||||
#define VEN_LEVEL_H264_3p2 0x13/* H.264 Level 3.2 */
|
||||
#define VEN_LEVEL_H264_4 0x14/* H.264 Level 4 */
|
||||
|
||||
#define VEN_LEVEL_H263_10 0x15/* H.263 Level 10 */
|
||||
#define VEN_LEVEL_H263_20 0x16/* H.263 Level 20 */
|
||||
#define VEN_LEVEL_H263_30 0x17/* H.263 Level 30 */
|
||||
#define VEN_LEVEL_H263_40 0x18/* H.263 Level 40 */
|
||||
#define VEN_LEVEL_H263_45 0x19/* H.263 Level 45 */
|
||||
#define VEN_LEVEL_H263_50 0x1A/* H.263 Level 50 */
|
||||
#define VEN_LEVEL_H263_60 0x1B/* H.263 Level 60 */
|
||||
#define VEN_LEVEL_H263_70 0x1C/* H.263 Level 70 */
|
||||
|
||||
/*Entropy coding model selection for H.264 encoder.*/
|
||||
#define VEN_ENTROPY_MODEL_CAVLC 1
|
||||
#define VEN_ENTROPY_MODEL_CABAC 2
|
||||
/*Cabac model number (0,1,2) for encoder.*/
|
||||
#define VEN_CABAC_MODEL_0 1/* CABAC Model 0. */
|
||||
#define VEN_CABAC_MODEL_1 2/* CABAC Model 1. */
|
||||
#define VEN_CABAC_MODEL_2 3/* CABAC Model 2. */
|
||||
|
||||
/*Deblocking filter control type for encoder.*/
|
||||
#define VEN_DB_DISABLE 1/* 1 - Disable deblocking filter*/
|
||||
#define VEN_DB_ALL_BLKG_BNDRY 2/* 2 - All blocking boundary filtering*/
|
||||
#define VEN_DB_SKIP_SLICE_BNDRY 3/* 3 - Filtering except sliceboundary*/
|
||||
|
||||
/*Different methods of Multi slice selection.*/
|
||||
#define VEN_MSLICE_OFF 1
|
||||
#define VEN_MSLICE_CNT_MB 2 /*number of MBscount per slice*/
|
||||
#define VEN_MSLICE_CNT_BYTE 3 /*number of bytes count per slice.*/
|
||||
#define VEN_MSLICE_GOB 4 /*Multi slice by GOB for H.263 only.*/
|
||||
|
||||
/*Different modes for Rate Control.*/
|
||||
#define VEN_RC_OFF 1
|
||||
#define VEN_RC_VBR_VFR 2
|
||||
#define VEN_RC_VBR_CFR 3
|
||||
#define VEN_RC_CBR_VFR 4
|
||||
#define VEN_RC_CBR_CFR 5
|
||||
|
||||
/*Different modes for flushing buffers*/
|
||||
#define VEN_FLUSH_INPUT 1
|
||||
#define VEN_FLUSH_OUTPUT 2
|
||||
#define VEN_FLUSH_ALL 3
|
||||
|
||||
/*Different input formats for YUV data.*/
|
||||
#define VEN_INPUTFMT_NV12 1/* NV12 Linear */
|
||||
#define VEN_INPUTFMT_NV21 2/* NV21 Linear */
|
||||
#define VEN_INPUTFMT_NV12_16M2KA 3/* NV12 Linear */
|
||||
|
||||
/*Different allowed rotation modes.*/
|
||||
#define VEN_ROTATION_0 1/* 0 degrees */
|
||||
#define VEN_ROTATION_90 2/* 90 degrees */
|
||||
#define VEN_ROTATION_180 3/* 180 degrees */
|
||||
#define VEN_ROTATION_270 4/* 270 degrees */
|
||||
|
||||
/*IOCTL timeout values*/
|
||||
#define VEN_TIMEOUT_INFINITE 0xffffffff
|
||||
|
||||
/*Different allowed intra refresh modes.*/
|
||||
#define VEN_IR_OFF 1
|
||||
#define VEN_IR_CYCLIC 2
|
||||
#define VEN_IR_RANDOM 3
|
||||
|
||||
/*IOCTL BASE CODES Not to be used directly by the client.*/
|
||||
/* Base value for ioctls that are not related to encoder configuration.*/
|
||||
#define VEN_IOCTLBASE_NENC 0x800
|
||||
/* Base value for encoder configuration ioctls*/
|
||||
#define VEN_IOCTLBASE_ENC 0x850
|
||||
|
||||
struct venc_ioctl_msg{
|
||||
void __user *in;
|
||||
void __user *out;
|
||||
};
|
||||
|
||||
/*NON ENCODER CONFIGURATION IOCTLs*/
|
||||
|
||||
/*IOCTL params:SET: InputData - unsigned long, OutputData - NULL*/
|
||||
#define VEN_IOCTL_SET_INTF_VERSION \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 0, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_timeout, OutputData - venc_msg*/
|
||||
#define VEN_IOCTL_CMD_READ_NEXT_MSG \
|
||||
_IOWR(VEN_IOCTLBASE_NENC, 1, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:CMD: InputData - NULL, OutputData - NULL*/
|
||||
#define VEN_IOCTL_CMD_STOP_READ_MSG _IO(VEN_IOCTLBASE_NENC, 2)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_allocatorproperty, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_allocatorproperty*/
|
||||
#define VEN_IOCTL_SET_INPUT_BUFFER_REQ \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 3, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_INPUT_BUFFER_REQ \
|
||||
_IOR(VEN_IOCTLBASE_NENC, 4, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_bufferpayload, OutputData - NULL*/
|
||||
#define VEN_IOCTL_CMD_ALLOC_INPUT_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 5, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_bufferpayload, OutputData - NULL*/
|
||||
#define VEN_IOCTL_SET_INPUT_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 6, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params: CMD: InputData - venc_bufferpayload, OutputData - NULL*/
|
||||
#define VEN_IOCTL_CMD_FREE_INPUT_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 7, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_allocatorproperty, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_allocatorproperty*/
|
||||
#define VEN_IOCTL_SET_OUTPUT_BUFFER_REQ \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 8, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_OUTPUT_BUFFER_REQ \
|
||||
_IOR(VEN_IOCTLBASE_NENC, 9, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_bufferpayload, OutputData - NULL*/
|
||||
#define VEN_IOCTL_CMD_ALLOC_OUTPUT_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 10, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_bufferpayload, OutputData - NULL*/
|
||||
#define VEN_IOCTL_SET_OUTPUT_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 11, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_bufferpayload, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_CMD_FREE_OUTPUT_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 12, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/* Asynchronous respone message code:* VEN_MSG_START*/
|
||||
#define VEN_IOCTL_CMD_START _IO(VEN_IOCTLBASE_NENC, 13)
|
||||
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_buffer, OutputData - NULL
|
||||
Asynchronous respone message code:VEN_MSG_INPUT_BUFFER_DONE*/
|
||||
#define VEN_IOCTL_CMD_ENCODE_FRAME \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 14, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_buffer, OutputData - NULL
|
||||
Asynchronous response message code:VEN_MSG_OUTPUT_BUFFER_DONE*/
|
||||
#define VEN_IOCTL_CMD_FILL_OUTPUT_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 15, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:CMD: InputData - venc_bufferflush, OutputData - NULL
|
||||
* Asynchronous response message code:VEN_MSG_INPUT_BUFFER_DONE*/
|
||||
#define VEN_IOCTL_CMD_FLUSH \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 16, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*Asynchronous respone message code:VEN_MSG_PAUSE*/
|
||||
#define VEN_IOCTL_CMD_PAUSE _IO(VEN_IOCTLBASE_NENC, 17)
|
||||
|
||||
/*Asynchronous respone message code:VEN_MSG_RESUME*/
|
||||
#define VEN_IOCTL_CMD_RESUME _IO(VEN_IOCTLBASE_NENC, 18)
|
||||
|
||||
/* Asynchronous respone message code:VEN_MSG_STOP*/
|
||||
#define VEN_IOCTL_CMD_STOP _IO(VEN_IOCTLBASE_NENC, 19)
|
||||
|
||||
#define VEN_IOCTL_SET_RECON_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 20, struct venc_ioctl_msg)
|
||||
|
||||
#define VEN_IOCTL_FREE_RECON_BUFFER \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 21, struct venc_ioctl_msg)
|
||||
|
||||
#define VEN_IOCTL_GET_RECON_BUFFER_SIZE \
|
||||
_IOW(VEN_IOCTLBASE_NENC, 22, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
|
||||
/*ENCODER PROPERTY CONFIGURATION & CAPABILITY IOCTLs*/
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_basecfg, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_basecfg*/
|
||||
#define VEN_IOCTL_SET_BASE_CFG \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 1, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_BASE_CFG \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 2, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_switch, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_switch*/
|
||||
#define VEN_IOCTL_SET_LIVE_MODE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 3, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_LIVE_MODE \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 4, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_profile, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_profile*/
|
||||
#define VEN_IOCTL_SET_CODEC_PROFILE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 5, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_CODEC_PROFILE \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 6, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - ven_profilelevel, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - ven_profilelevel*/
|
||||
#define VEN_IOCTL_SET_PROFILE_LEVEL \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 7, struct venc_ioctl_msg)
|
||||
|
||||
#define VEN_IOCTL_GET_PROFILE_LEVEL \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 8, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_switch, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_switch*/
|
||||
#define VEN_IOCTL_SET_SHORT_HDR \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 9, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_SHORT_HDR \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 10, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params: SET: InputData - venc_sessionqp, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_sessionqp*/
|
||||
#define VEN_IOCTL_SET_SESSION_QP \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 11, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_SESSION_QP \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 12, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_intraperiod, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_intraperiod*/
|
||||
#define VEN_IOCTL_SET_INTRA_PERIOD \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 13, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_INTRA_PERIOD \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 14, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/* Request an Iframe*/
|
||||
#define VEN_IOCTL_CMD_REQUEST_IFRAME _IO(VEN_IOCTLBASE_ENC, 15)
|
||||
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_capability*/
|
||||
#define VEN_IOCTL_GET_CAPABILITY \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 16, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_seqheader*/
|
||||
#define VEN_IOCTL_GET_SEQUENCE_HDR \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 17, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_entropycfg, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_entropycfg*/
|
||||
#define VEN_IOCTL_SET_ENTROPY_CFG \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 18, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_ENTROPY_CFG \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 19, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_dbcfg, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_dbcfg*/
|
||||
#define VEN_IOCTL_SET_DEBLOCKING_CFG \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 20, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_DEBLOCKING_CFG \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 21, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_intrarefresh, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_intrarefresh*/
|
||||
#define VEN_IOCTL_SET_INTRA_REFRESH \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 22, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_INTRA_REFRESH \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 23, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_multiclicecfg, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_multiclicecfg*/
|
||||
#define VEN_IOCTL_SET_MULTI_SLICE_CFG \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 24, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_MULTI_SLICE_CFG \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 25, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_ratectrlcfg, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_ratectrlcfg*/
|
||||
#define VEN_IOCTL_SET_RATE_CTRL_CFG \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 26, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_RATE_CTRL_CFG \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 27, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_voptimingcfg, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_voptimingcfg*/
|
||||
#define VEN_IOCTL_SET_VOP_TIMING_CFG \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 28, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_VOP_TIMING_CFG \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 29, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_framerate, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_framerate*/
|
||||
#define VEN_IOCTL_SET_FRAME_RATE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 30, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_FRAME_RATE \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 31, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_targetbitrate, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_targetbitrate*/
|
||||
#define VEN_IOCTL_SET_TARGET_BITRATE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 32, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_TARGET_BITRATE \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 33, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_rotation, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_rotation*/
|
||||
#define VEN_IOCTL_SET_ROTATION \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 34, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_ROTATION \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 35, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_headerextension, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_headerextension*/
|
||||
#define VEN_IOCTL_SET_HEC \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 36, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_HEC \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 37, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_switch, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_switch*/
|
||||
#define VEN_IOCTL_SET_DATA_PARTITION \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 38, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_DATA_PARTITION \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 39, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_switch, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_switch*/
|
||||
#define VEN_IOCTL_SET_RVLC \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 40, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_RVLC \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 41, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_switch, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_switch*/
|
||||
#define VEN_IOCTL_SET_AC_PREDICTION \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 42, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_AC_PREDICTION \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 43, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_qprange, OutputData - NULL
|
||||
GET: InputData - NULL, OutputData - venc_qprange*/
|
||||
#define VEN_IOCTL_SET_QP_RANGE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 44, struct venc_ioctl_msg)
|
||||
#define VEN_IOCTL_GET_QP_RANGE \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 45, struct venc_ioctl_msg)
|
||||
|
||||
#define VEN_IOCTL_GET_NUMBER_INSTANCES \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 46, struct venc_ioctl_msg)
|
||||
|
||||
#define VEN_IOCTL_SET_METABUFFER_MODE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 47, struct venc_ioctl_msg)
|
||||
|
||||
|
||||
/*IOCTL params:SET: InputData - unsigned int, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_EXTRADATA \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 48, struct venc_ioctl_msg)
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - unsigned int.*/
|
||||
#define VEN_IOCTL_GET_EXTRADATA \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 49, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - NULL, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_SLICE_DELIVERY_MODE \
|
||||
_IO(VEN_IOCTLBASE_ENC, 50)
|
||||
|
||||
#define VEN_IOCTL_SET_H263_PLUSPTYPE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 51, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_range, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_CAPABILITY_LTRCOUNT \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 52, struct venc_ioctl_msg)
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_range.*/
|
||||
#define VEN_IOCTL_GET_CAPABILITY_LTRCOUNT \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 53, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_ltrmode, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_LTRMODE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 54, struct venc_ioctl_msg)
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_ltrmode.*/
|
||||
#define VEN_IOCTL_GET_LTRMODE \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 55, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_ltrcount, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_LTRCOUNT \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 56, struct venc_ioctl_msg)
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_ltrcount.*/
|
||||
#define VEN_IOCTL_GET_LTRCOUNT \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 57, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_ltrperiod, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_LTRPERIOD \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 58, struct venc_ioctl_msg)
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_ltrperiod.*/
|
||||
#define VEN_IOCTL_GET_LTRPERIOD \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 59, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_ltruse, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_LTRUSE \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 60, struct venc_ioctl_msg)
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_ltruse.*/
|
||||
#define VEN_IOCTL_GET_LTRUSE \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 61, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - venc_ltrmark, OutputData - NULL.*/
|
||||
#define VEN_IOCTL_SET_LTRMARK \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 62, struct venc_ioctl_msg)
|
||||
/*IOCTL params:GET: InputData - NULL, OutputData - venc_ltrmark.*/
|
||||
#define VEN_IOCTL_GET_LTRMARK \
|
||||
_IOR(VEN_IOCTLBASE_ENC, 63, struct venc_ioctl_msg)
|
||||
|
||||
/*IOCTL params:SET: InputData - unsigned int, OutputData - NULL*/
|
||||
#define VEN_IOCTL_SET_SPS_PPS_FOR_IDR \
|
||||
_IOW(VEN_IOCTLBASE_ENC, 64, struct venc_ioctl_msg)
|
||||
|
||||
struct venc_range {
|
||||
unsigned long max;
|
||||
unsigned long min;
|
||||
unsigned long step_size;
|
||||
};
|
||||
|
||||
struct venc_switch{
|
||||
unsigned char status;
|
||||
};
|
||||
|
||||
struct venc_allocatorproperty{
|
||||
unsigned long mincount;
|
||||
unsigned long maxcount;
|
||||
unsigned long actualcount;
|
||||
unsigned long datasize;
|
||||
unsigned long suffixsize;
|
||||
unsigned long alignment;
|
||||
unsigned long bufpoolid;
|
||||
};
|
||||
|
||||
struct venc_bufferpayload{
|
||||
unsigned char *pbuffer;
|
||||
size_t sz;
|
||||
int fd;
|
||||
unsigned int offset;
|
||||
unsigned int maped_size;
|
||||
unsigned long filled_len;
|
||||
};
|
||||
|
||||
struct venc_buffer{
|
||||
unsigned char *ptrbuffer;
|
||||
unsigned long sz;
|
||||
unsigned long len;
|
||||
unsigned long offset;
|
||||
long long timestamp;
|
||||
unsigned long flags;
|
||||
void *clientdata;
|
||||
};
|
||||
|
||||
struct venc_basecfg{
|
||||
unsigned long input_width;
|
||||
unsigned long input_height;
|
||||
unsigned long dvs_width;
|
||||
unsigned long dvs_height;
|
||||
unsigned long codectype;
|
||||
unsigned long fps_num;
|
||||
unsigned long fps_den;
|
||||
unsigned long targetbitrate;
|
||||
unsigned long inputformat;
|
||||
};
|
||||
|
||||
struct venc_profile{
|
||||
unsigned long profile;
|
||||
};
|
||||
struct ven_profilelevel{
|
||||
unsigned long level;
|
||||
};
|
||||
|
||||
struct venc_sessionqp{
|
||||
unsigned long iframeqp;
|
||||
unsigned long pframqp;
|
||||
};
|
||||
|
||||
struct venc_qprange{
|
||||
unsigned long maxqp;
|
||||
unsigned long minqp;
|
||||
};
|
||||
|
||||
struct venc_plusptype {
|
||||
unsigned long plusptype_enable;
|
||||
};
|
||||
|
||||
struct venc_intraperiod{
|
||||
unsigned long num_pframes;
|
||||
unsigned long num_bframes;
|
||||
};
|
||||
struct venc_seqheader{
|
||||
unsigned char *hdrbufptr;
|
||||
unsigned long bufsize;
|
||||
unsigned long hdrlen;
|
||||
};
|
||||
|
||||
struct venc_capability{
|
||||
unsigned long codec_types;
|
||||
unsigned long maxframe_width;
|
||||
unsigned long maxframe_height;
|
||||
unsigned long maxtarget_bitrate;
|
||||
unsigned long maxframe_rate;
|
||||
unsigned long input_formats;
|
||||
unsigned char dvs;
|
||||
};
|
||||
|
||||
struct venc_entropycfg{
|
||||
unsigned longentropysel;
|
||||
unsigned long cabacmodel;
|
||||
};
|
||||
|
||||
struct venc_dbcfg{
|
||||
unsigned long db_mode;
|
||||
unsigned long slicealpha_offset;
|
||||
unsigned long slicebeta_offset;
|
||||
};
|
||||
|
||||
struct venc_intrarefresh{
|
||||
unsigned long irmode;
|
||||
unsigned long mbcount;
|
||||
};
|
||||
|
||||
struct venc_multiclicecfg{
|
||||
unsigned long mslice_mode;
|
||||
unsigned long mslice_size;
|
||||
};
|
||||
|
||||
struct venc_bufferflush{
|
||||
unsigned long flush_mode;
|
||||
};
|
||||
|
||||
struct venc_ratectrlcfg{
|
||||
unsigned long rcmode;
|
||||
};
|
||||
|
||||
struct venc_voptimingcfg{
|
||||
unsigned long voptime_resolution;
|
||||
};
|
||||
struct venc_framerate{
|
||||
unsigned long fps_denominator;
|
||||
unsigned long fps_numerator;
|
||||
};
|
||||
|
||||
struct venc_targetbitrate{
|
||||
unsigned long target_bitrate;
|
||||
};
|
||||
|
||||
|
||||
struct venc_rotation{
|
||||
unsigned long rotation;
|
||||
};
|
||||
|
||||
struct venc_timeout{
|
||||
unsigned long millisec;
|
||||
};
|
||||
|
||||
struct venc_headerextension{
|
||||
unsigned long header_extension;
|
||||
};
|
||||
|
||||
struct venc_msg{
|
||||
unsigned long statuscode;
|
||||
unsigned long msgcode;
|
||||
struct venc_buffer buf;
|
||||
unsigned long msgdata_size;
|
||||
};
|
||||
|
||||
struct venc_recon_addr{
|
||||
unsigned char *pbuffer;
|
||||
unsigned long buffer_size;
|
||||
unsigned long pmem_fd;
|
||||
unsigned long offset;
|
||||
};
|
||||
|
||||
struct venc_recon_buff_size{
|
||||
int width;
|
||||
int height;
|
||||
int size;
|
||||
int alignment;
|
||||
};
|
||||
|
||||
struct venc_ltrmode {
|
||||
unsigned long ltr_mode;
|
||||
};
|
||||
|
||||
struct venc_ltrcount {
|
||||
unsigned long ltr_count;
|
||||
};
|
||||
|
||||
struct venc_ltrperiod {
|
||||
unsigned long ltr_period;
|
||||
};
|
||||
|
||||
struct venc_ltruse {
|
||||
unsigned long ltr_id;
|
||||
unsigned long ltr_frames;
|
||||
};
|
||||
|
||||
#endif /* _UAPI_MSM_VIDC_ENC_H_ */
|
||||
|
|
@ -0,0 +1,184 @@
|
|||
#ifndef _UAPI__LINUX_NETLINK_H
|
||||
#define _UAPI__LINUX_NETLINK_H
|
||||
|
||||
#include <linux/socket.h> /* for __kernel_sa_family_t */
|
||||
#include <linux/types.h>
|
||||
|
||||
#define NETLINK_ROUTE 0 /* Routing/device hook */
|
||||
#define NETLINK_UNUSED 1 /* Unused number */
|
||||
#define NETLINK_USERSOCK 2 /* Reserved for user mode socket protocols */
|
||||
#define NETLINK_FIREWALL 3 /* Unused number, formerly ip_queue */
|
||||
#define NETLINK_SOCK_DIAG 4 /* socket monitoring */
|
||||
#define NETLINK_NFLOG 5 /* netfilter/iptables ULOG */
|
||||
#define NETLINK_XFRM 6 /* ipsec */
|
||||
#define NETLINK_SELINUX 7 /* SELinux event notifications */
|
||||
#define NETLINK_ISCSI 8 /* Open-iSCSI */
|
||||
#define NETLINK_AUDIT 9 /* auditing */
|
||||
#define NETLINK_FIB_LOOKUP 10
|
||||
#define NETLINK_CONNECTOR 11
|
||||
#define NETLINK_NETFILTER 12 /* netfilter subsystem */
|
||||
#define NETLINK_IP6_FW 13
|
||||
#define NETLINK_DNRTMSG 14 /* DECnet routing messages */
|
||||
#define NETLINK_KOBJECT_UEVENT 15 /* Kernel messages to userspace */
|
||||
#define NETLINK_GENERIC 16
|
||||
/* leave room for NETLINK_DM (DM Events) */
|
||||
#define NETLINK_SCSITRANSPORT 18 /* SCSI Transports */
|
||||
#define NETLINK_ECRYPTFS 19
|
||||
#define NETLINK_RDMA 20
|
||||
#define NETLINK_CRYPTO 21 /* Crypto layer */
|
||||
#define NETLINK_SOCKEV 22 /* Socket Administrative Events */
|
||||
#define NETLINK_INET_DIAG NETLINK_SOCK_DIAG
|
||||
|
||||
#define MAX_LINKS 32
|
||||
|
||||
struct sockaddr_nl {
|
||||
__kernel_sa_family_t nl_family; /* AF_NETLINK */
|
||||
unsigned short nl_pad; /* zero */
|
||||
__u32 nl_pid; /* port ID */
|
||||
__u32 nl_groups; /* multicast groups mask */
|
||||
};
|
||||
|
||||
struct nlmsghdr {
|
||||
__u32 nlmsg_len; /* Length of message including header */
|
||||
__u16 nlmsg_type; /* Message content */
|
||||
__u16 nlmsg_flags; /* Additional flags */
|
||||
__u32 nlmsg_seq; /* Sequence number */
|
||||
__u32 nlmsg_pid; /* Sending process port ID */
|
||||
};
|
||||
|
||||
/* Flags values */
|
||||
|
||||
#define NLM_F_REQUEST 1 /* It is request message. */
|
||||
#define NLM_F_MULTI 2 /* Multipart message, terminated by NLMSG_DONE */
|
||||
#define NLM_F_ACK 4 /* Reply with ack, with zero or error code */
|
||||
#define NLM_F_ECHO 8 /* Echo this request */
|
||||
#define NLM_F_DUMP_INTR 16 /* Dump was inconsistent due to sequence change */
|
||||
|
||||
/* Modifiers to GET request */
|
||||
#define NLM_F_ROOT 0x100 /* specify tree root */
|
||||
#define NLM_F_MATCH 0x200 /* return all matching */
|
||||
#define NLM_F_ATOMIC 0x400 /* atomic GET */
|
||||
#define NLM_F_DUMP (NLM_F_ROOT|NLM_F_MATCH)
|
||||
|
||||
/* Modifiers to NEW request */
|
||||
#define NLM_F_REPLACE 0x100 /* Override existing */
|
||||
#define NLM_F_EXCL 0x200 /* Do not touch, if it exists */
|
||||
#define NLM_F_CREATE 0x400 /* Create, if it does not exist */
|
||||
#define NLM_F_APPEND 0x800 /* Add to end of list */
|
||||
|
||||
/*
|
||||
4.4BSD ADD NLM_F_CREATE|NLM_F_EXCL
|
||||
4.4BSD CHANGE NLM_F_REPLACE
|
||||
|
||||
True CHANGE NLM_F_CREATE|NLM_F_REPLACE
|
||||
Append NLM_F_CREATE
|
||||
Check NLM_F_EXCL
|
||||
*/
|
||||
|
||||
#define NLMSG_ALIGNTO 4U
|
||||
#define NLMSG_ALIGN(len) ( ((len)+NLMSG_ALIGNTO-1) & ~(NLMSG_ALIGNTO-1) )
|
||||
#define NLMSG_HDRLEN ((int) NLMSG_ALIGN(sizeof(struct nlmsghdr)))
|
||||
#define NLMSG_LENGTH(len) ((len) + NLMSG_HDRLEN)
|
||||
#define NLMSG_SPACE(len) NLMSG_ALIGN(NLMSG_LENGTH(len))
|
||||
#define NLMSG_DATA(nlh) ((void*)(((char*)nlh) + NLMSG_LENGTH(0)))
|
||||
#define NLMSG_NEXT(nlh,len) ((len) -= NLMSG_ALIGN((nlh)->nlmsg_len), \
|
||||
(struct nlmsghdr*)(((char*)(nlh)) + NLMSG_ALIGN((nlh)->nlmsg_len)))
|
||||
#define NLMSG_OK(nlh,len) ((len) >= (int)sizeof(struct nlmsghdr) && \
|
||||
(nlh)->nlmsg_len >= sizeof(struct nlmsghdr) && \
|
||||
(nlh)->nlmsg_len <= (len))
|
||||
#define NLMSG_PAYLOAD(nlh,len) ((nlh)->nlmsg_len - NLMSG_SPACE((len)))
|
||||
|
||||
#define NLMSG_NOOP 0x1 /* Nothing. */
|
||||
#define NLMSG_ERROR 0x2 /* Error */
|
||||
#define NLMSG_DONE 0x3 /* End of a dump */
|
||||
#define NLMSG_OVERRUN 0x4 /* Data lost */
|
||||
|
||||
#define NLMSG_MIN_TYPE 0x10 /* < 0x10: reserved control messages */
|
||||
|
||||
struct nlmsgerr {
|
||||
int error;
|
||||
struct nlmsghdr msg;
|
||||
};
|
||||
|
||||
#define NETLINK_ADD_MEMBERSHIP 1
|
||||
#define NETLINK_DROP_MEMBERSHIP 2
|
||||
#define NETLINK_PKTINFO 3
|
||||
#define NETLINK_BROADCAST_ERROR 4
|
||||
#define NETLINK_NO_ENOBUFS 5
|
||||
#define NETLINK_RX_RING 6
|
||||
#define NETLINK_TX_RING 7
|
||||
|
||||
struct nl_pktinfo {
|
||||
__u32 group;
|
||||
};
|
||||
|
||||
struct nl_mmap_req {
|
||||
unsigned int nm_block_size;
|
||||
unsigned int nm_block_nr;
|
||||
unsigned int nm_frame_size;
|
||||
unsigned int nm_frame_nr;
|
||||
};
|
||||
|
||||
struct nl_mmap_hdr {
|
||||
unsigned int nm_status;
|
||||
unsigned int nm_len;
|
||||
__u32 nm_group;
|
||||
/* credentials */
|
||||
__u32 nm_pid;
|
||||
__u32 nm_uid;
|
||||
__u32 nm_gid;
|
||||
};
|
||||
|
||||
enum nl_mmap_status {
|
||||
NL_MMAP_STATUS_UNUSED,
|
||||
NL_MMAP_STATUS_RESERVED,
|
||||
NL_MMAP_STATUS_VALID,
|
||||
NL_MMAP_STATUS_COPY,
|
||||
NL_MMAP_STATUS_SKIP,
|
||||
};
|
||||
|
||||
#define NL_MMAP_MSG_ALIGNMENT NLMSG_ALIGNTO
|
||||
#define NL_MMAP_MSG_ALIGN(sz) __ALIGN_KERNEL(sz, NL_MMAP_MSG_ALIGNMENT)
|
||||
#define NL_MMAP_HDRLEN NL_MMAP_MSG_ALIGN(sizeof(struct nl_mmap_hdr))
|
||||
|
||||
#define NET_MAJOR 36 /* Major 36 is reserved for networking */
|
||||
|
||||
enum {
|
||||
NETLINK_UNCONNECTED = 0,
|
||||
NETLINK_CONNECTED,
|
||||
};
|
||||
|
||||
/*
|
||||
* <------- NLA_HDRLEN ------> <-- NLA_ALIGN(payload)-->
|
||||
* +---------------------+- - -+- - - - - - - - - -+- - -+
|
||||
* | Header | Pad | Payload | Pad |
|
||||
* | (struct nlattr) | ing | | ing |
|
||||
* +---------------------+- - -+- - - - - - - - - -+- - -+
|
||||
* <-------------- nlattr->nla_len -------------->
|
||||
*/
|
||||
|
||||
struct nlattr {
|
||||
__u16 nla_len;
|
||||
__u16 nla_type;
|
||||
};
|
||||
|
||||
/*
|
||||
* nla_type (16 bits)
|
||||
* +---+---+-------------------------------+
|
||||
* | N | O | Attribute Type |
|
||||
* +---+---+-------------------------------+
|
||||
* N := Carries nested attributes
|
||||
* O := Payload stored in network byte order
|
||||
*
|
||||
* Note: The N and O flag are mutually exclusive.
|
||||
*/
|
||||
#define NLA_F_NESTED (1 << 15)
|
||||
#define NLA_F_NET_BYTEORDER (1 << 14)
|
||||
#define NLA_TYPE_MASK ~(NLA_F_NESTED | NLA_F_NET_BYTEORDER)
|
||||
|
||||
#define NLA_ALIGNTO 4
|
||||
#define NLA_ALIGN(len) (((len) + NLA_ALIGNTO - 1) & ~(NLA_ALIGNTO - 1))
|
||||
#define NLA_HDRLEN ((int) NLA_ALIGN(sizeof(struct nlattr)))
|
||||
|
||||
|
||||
#endif /* _UAPI__LINUX_NETLINK_H */
|
||||
|
|
@ -0,0 +1,296 @@
|
|||
#ifndef _UAPI_QSEECOM_H_
|
||||
#define _UAPI_QSEECOM_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/ioctl.h>
|
||||
|
||||
#define MAX_ION_FD 4
|
||||
#define MAX_APP_NAME_SIZE 64
|
||||
#define QSEECOM_HASH_SIZE 32
|
||||
/*
|
||||
* struct qseecom_register_listener_req -
|
||||
* for register listener ioctl request
|
||||
* @listener_id - service id (shared between userspace and QSE)
|
||||
* @ifd_data_fd - ion handle
|
||||
* @virt_sb_base - shared buffer base in user space
|
||||
* @sb_size - shared buffer size
|
||||
*/
|
||||
struct qseecom_register_listener_req {
|
||||
uint32_t listener_id; /* in */
|
||||
int32_t ifd_data_fd; /* in */
|
||||
void *virt_sb_base; /* in */
|
||||
uint32_t sb_size; /* in */
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_send_cmd_req - for send command ioctl request
|
||||
* @cmd_req_len - command buffer length
|
||||
* @cmd_req_buf - command buffer
|
||||
* @resp_len - response buffer length
|
||||
* @resp_buf - response buffer
|
||||
*/
|
||||
struct qseecom_send_cmd_req {
|
||||
void *cmd_req_buf; /* in */
|
||||
unsigned int cmd_req_len; /* in */
|
||||
void *resp_buf; /* in/out */
|
||||
unsigned int resp_len; /* in/out */
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_ion_fd_info - ion fd handle data information
|
||||
* @fd - ion handle to some memory allocated in user space
|
||||
* @cmd_buf_offset - command buffer offset
|
||||
*/
|
||||
struct qseecom_ion_fd_info {
|
||||
int32_t fd;
|
||||
uint32_t cmd_buf_offset;
|
||||
};
|
||||
/*
|
||||
* struct qseecom_send_modfd_cmd_req - for send command ioctl request
|
||||
* @cmd_req_len - command buffer length
|
||||
* @cmd_req_buf - command buffer
|
||||
* @resp_len - response buffer length
|
||||
* @resp_buf - response buffer
|
||||
* @ifd_data_fd - ion handle to memory allocated in user space
|
||||
* @cmd_buf_offset - command buffer offset
|
||||
*/
|
||||
struct qseecom_send_modfd_cmd_req {
|
||||
void *cmd_req_buf; /* in */
|
||||
unsigned int cmd_req_len; /* in */
|
||||
void *resp_buf; /* in/out */
|
||||
unsigned int resp_len; /* in/out */
|
||||
struct qseecom_ion_fd_info ifd_data[MAX_ION_FD];
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_listener_send_resp_req - signal to continue the send_cmd req.
|
||||
* Used as a trigger from HLOS service to notify QSEECOM that it's done with its
|
||||
* operation and provide the response for QSEECOM can continue the incomplete
|
||||
* command execution
|
||||
* @resp_len - Length of the response
|
||||
* @resp_buf - Response buffer where the response of the cmd should go.
|
||||
*/
|
||||
struct qseecom_send_resp_req {
|
||||
void *resp_buf; /* in */
|
||||
unsigned int resp_len; /* in */
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_load_img_data - for sending image length information and
|
||||
* ion file descriptor to the qseecom driver. ion file descriptor is used
|
||||
* for retrieving the ion file handle and in turn the physical address of
|
||||
* the image location.
|
||||
* @mdt_len - Length of the .mdt file in bytes.
|
||||
* @img_len - Length of the .mdt + .b00 +..+.bxx images files in bytes
|
||||
* @ion_fd - Ion file descriptor used when allocating memory.
|
||||
* @img_name - Name of the image.
|
||||
*/
|
||||
struct qseecom_load_img_req {
|
||||
uint32_t mdt_len; /* in */
|
||||
uint32_t img_len; /* in */
|
||||
int32_t ifd_data_fd; /* in */
|
||||
char img_name[MAX_APP_NAME_SIZE]; /* in */
|
||||
int app_id; /* out*/
|
||||
};
|
||||
|
||||
struct qseecom_set_sb_mem_param_req {
|
||||
int32_t ifd_data_fd; /* in */
|
||||
void *virt_sb_base; /* in */
|
||||
uint32_t sb_len; /* in */
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_qseos_version_req - get qseos version
|
||||
* @qseos_version - version number
|
||||
*/
|
||||
struct qseecom_qseos_version_req {
|
||||
unsigned int qseos_version; /* in */
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_qseos_app_load_query - verify if app is loaded in qsee
|
||||
* @app_name[MAX_APP_NAME_SIZE]- name of the app.
|
||||
* @app_id - app id.
|
||||
*/
|
||||
struct qseecom_qseos_app_load_query {
|
||||
char app_name[MAX_APP_NAME_SIZE]; /* in */
|
||||
int app_id; /* out */
|
||||
};
|
||||
|
||||
struct qseecom_send_svc_cmd_req {
|
||||
uint32_t cmd_id;
|
||||
void *cmd_req_buf; /* in */
|
||||
unsigned int cmd_req_len; /* in */
|
||||
void *resp_buf; /* in/out */
|
||||
unsigned int resp_len; /* in/out */
|
||||
};
|
||||
|
||||
enum qseecom_key_management_usage_type {
|
||||
QSEOS_KM_USAGE_DISK_ENCRYPTION = 0x01,
|
||||
QSEOS_KM_USAGE_FILE_ENCRYPTION = 0x02,
|
||||
QSEOS_KM_USAGE_ICE_DISK_ENCRYPTION = 0x03,
|
||||
QSEOS_KM_USAGE_ICE_FILE_ENCRYPTION = 0x04,
|
||||
QSEOS_KM_USAGE_MAX
|
||||
};
|
||||
|
||||
struct qseecom_create_key_req {
|
||||
unsigned char hash32[QSEECOM_HASH_SIZE];
|
||||
enum qseecom_key_management_usage_type usage;
|
||||
};
|
||||
|
||||
struct qseecom_wipe_key_req {
|
||||
enum qseecom_key_management_usage_type usage;
|
||||
int wipe_key_flag;/* 1->remove key from storage(alone with clear key) */
|
||||
/* 0->do not remove from storage (clear key) */
|
||||
};
|
||||
|
||||
struct qseecom_update_key_userinfo_req {
|
||||
unsigned char current_hash32[QSEECOM_HASH_SIZE];
|
||||
unsigned char new_hash32[QSEECOM_HASH_SIZE];
|
||||
enum qseecom_key_management_usage_type usage;
|
||||
};
|
||||
|
||||
#define SHA256_DIGEST_LENGTH (256/8)
|
||||
/*
|
||||
* struct qseecom_save_partition_hash_req
|
||||
* @partition_id - partition id.
|
||||
* @hash[SHA256_DIGEST_LENGTH] - sha256 digest.
|
||||
*/
|
||||
struct qseecom_save_partition_hash_req {
|
||||
int partition_id; /* in */
|
||||
char digest[SHA256_DIGEST_LENGTH]; /* in */
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_is_es_activated_req
|
||||
* @is_activated - 1=true , 0=false
|
||||
*/
|
||||
struct qseecom_is_es_activated_req {
|
||||
int is_activated; /* out */
|
||||
};
|
||||
|
||||
enum qseecom_bandwidth_request_mode {
|
||||
INACTIVE = 0,
|
||||
LOW,
|
||||
MEDIUM,
|
||||
HIGH,
|
||||
};
|
||||
|
||||
/*
|
||||
* struct qseecom_send_modfd_resp - for send command ioctl request
|
||||
* @req_len - command buffer length
|
||||
* @req_buf - command buffer
|
||||
* @ifd_data_fd - ion handle to memory allocated in user space
|
||||
* @cmd_buf_offset - command buffer offset
|
||||
*/
|
||||
struct qseecom_send_modfd_listener_resp {
|
||||
void *resp_buf_ptr; /* in */
|
||||
unsigned int resp_len; /* in */
|
||||
struct qseecom_ion_fd_info ifd_data[MAX_ION_FD]; /* in */
|
||||
};
|
||||
|
||||
struct qseecom_qteec_req {
|
||||
void *req_ptr;
|
||||
uint32_t req_len;
|
||||
void *resp_ptr;
|
||||
uint32_t resp_len;
|
||||
};
|
||||
|
||||
struct qseecom_qteec_modfd_req {
|
||||
void *req_ptr;
|
||||
uint32_t req_len;
|
||||
void *resp_ptr;
|
||||
uint32_t resp_len;
|
||||
struct qseecom_ion_fd_info ifd_data[MAX_ION_FD];
|
||||
};
|
||||
|
||||
struct file;
|
||||
|
||||
extern long qseecom_ioctl(struct file *file,
|
||||
unsigned cmd, unsigned long arg);
|
||||
|
||||
#define QSEECOM_IOC_MAGIC 0x97
|
||||
|
||||
|
||||
#define QSEECOM_IOCTL_REGISTER_LISTENER_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 1, struct qseecom_register_listener_req)
|
||||
|
||||
#define QSEECOM_IOCTL_UNREGISTER_LISTENER_REQ \
|
||||
_IO(QSEECOM_IOC_MAGIC, 2)
|
||||
|
||||
#define QSEECOM_IOCTL_SEND_CMD_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 3, struct qseecom_send_cmd_req)
|
||||
|
||||
#define QSEECOM_IOCTL_SEND_MODFD_CMD_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 4, struct qseecom_send_modfd_cmd_req)
|
||||
|
||||
#define QSEECOM_IOCTL_RECEIVE_REQ \
|
||||
_IO(QSEECOM_IOC_MAGIC, 5)
|
||||
|
||||
#define QSEECOM_IOCTL_SEND_RESP_REQ \
|
||||
_IO(QSEECOM_IOC_MAGIC, 6)
|
||||
|
||||
#define QSEECOM_IOCTL_LOAD_APP_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 7, struct qseecom_load_img_req)
|
||||
|
||||
#define QSEECOM_IOCTL_SET_MEM_PARAM_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 8, struct qseecom_set_sb_mem_param_req)
|
||||
|
||||
#define QSEECOM_IOCTL_UNLOAD_APP_REQ \
|
||||
_IO(QSEECOM_IOC_MAGIC, 9)
|
||||
|
||||
#define QSEECOM_IOCTL_GET_QSEOS_VERSION_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 10, struct qseecom_qseos_version_req)
|
||||
|
||||
#define QSEECOM_IOCTL_PERF_ENABLE_REQ \
|
||||
_IO(QSEECOM_IOC_MAGIC, 11)
|
||||
|
||||
#define QSEECOM_IOCTL_PERF_DISABLE_REQ \
|
||||
_IO(QSEECOM_IOC_MAGIC, 12)
|
||||
|
||||
#define QSEECOM_IOCTL_LOAD_EXTERNAL_ELF_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 13, struct qseecom_load_img_req)
|
||||
|
||||
#define QSEECOM_IOCTL_UNLOAD_EXTERNAL_ELF_REQ \
|
||||
_IO(QSEECOM_IOC_MAGIC, 14)
|
||||
|
||||
#define QSEECOM_IOCTL_APP_LOADED_QUERY_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 15, struct qseecom_qseos_app_load_query)
|
||||
|
||||
#define QSEECOM_IOCTL_SEND_CMD_SERVICE_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 16, struct qseecom_send_svc_cmd_req)
|
||||
|
||||
#define QSEECOM_IOCTL_CREATE_KEY_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 17, struct qseecom_create_key_req)
|
||||
|
||||
#define QSEECOM_IOCTL_WIPE_KEY_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 18, struct qseecom_wipe_key_req)
|
||||
|
||||
#define QSEECOM_IOCTL_SAVE_PARTITION_HASH_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 19, struct qseecom_save_partition_hash_req)
|
||||
|
||||
#define QSEECOM_IOCTL_IS_ES_ACTIVATED_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 20, struct qseecom_is_es_activated_req)
|
||||
|
||||
#define QSEECOM_IOCTL_SEND_MODFD_RESP \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 21, struct qseecom_send_modfd_listener_resp)
|
||||
|
||||
#define QSEECOM_IOCTL_SET_BUS_SCALING_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 23, int)
|
||||
|
||||
#define QSEECOM_IOCTL_UPDATE_KEY_USER_INFO_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 24, struct qseecom_update_key_userinfo_req)
|
||||
|
||||
#define QSEECOM_QTEEC_IOCTL_OPEN_SESSION_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 30, struct qseecom_qteec_modfd_req)
|
||||
|
||||
#define QSEECOM_QTEEC_IOCTL_CLOSE_SESSION_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 31, struct qseecom_qteec_req)
|
||||
|
||||
#define QSEECOM_QTEEC_IOCTL_INVOKE_MODFD_CMD_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 32, struct qseecom_qteec_modfd_req)
|
||||
|
||||
#define QSEECOM_QTEEC_IOCTL_REQUEST_CANCELLATION_REQ \
|
||||
_IOWR(QSEECOM_IOC_MAGIC, 33, struct qseecom_qteec_modfd_req)
|
||||
|
||||
#endif /* _UAPI_QSEECOM_H_ */
|
||||
|
|
@ -0,0 +1,251 @@
|
|||
/*
|
||||
* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 and
|
||||
* only version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* RMNET Data configuration specification
|
||||
*/
|
||||
|
||||
#ifndef _RMNET_DATA_H_
|
||||
#define _RMNET_DATA_H_
|
||||
|
||||
/* ***************** Constants ********************************************** */
|
||||
#define RMNET_LOCAL_LOGICAL_ENDPOINT -1
|
||||
|
||||
#define RMNET_EGRESS_FORMAT__RESERVED__ (1<<0)
|
||||
#define RMNET_EGRESS_FORMAT_MAP (1<<1)
|
||||
#define RMNET_EGRESS_FORMAT_AGGREGATION (1<<2)
|
||||
#define RMNET_EGRESS_FORMAT_MUXING (1<<3)
|
||||
#define RMNET_EGRESS_FORMAT_MAP_CKSUMV3 (1<<4)
|
||||
|
||||
#define RMNET_INGRESS_FIX_ETHERNET (1<<0)
|
||||
#define RMNET_INGRESS_FORMAT_MAP (1<<1)
|
||||
#define RMNET_INGRESS_FORMAT_DEAGGREGATION (1<<2)
|
||||
#define RMNET_INGRESS_FORMAT_DEMUXING (1<<3)
|
||||
#define RMNET_INGRESS_FORMAT_MAP_COMMANDS (1<<4)
|
||||
#define RMNET_INGRESS_FORMAT_MAP_CKSUMV3 (1<<5)
|
||||
|
||||
/* ***************** Netlink API ******************************************** */
|
||||
#define RMNET_NETLINK_PROTO 31
|
||||
#define RMNET_MAX_STR_LEN 16
|
||||
#define RMNET_NL_DATA_MAX_LEN 64
|
||||
|
||||
#define RMNET_NETLINK_MSG_COMMAND 0
|
||||
#define RMNET_NETLINK_MSG_RETURNCODE 1
|
||||
#define RMNET_NETLINK_MSG_RETURNDATA 2
|
||||
|
||||
struct rmnet_nl_msg_s {
|
||||
uint16_t reserved;
|
||||
uint16_t message_type;
|
||||
uint16_t reserved2:14;
|
||||
uint16_t crd:2;
|
||||
union {
|
||||
uint16_t arg_length;
|
||||
uint16_t return_code;
|
||||
};
|
||||
union {
|
||||
uint8_t data[RMNET_NL_DATA_MAX_LEN];
|
||||
struct {
|
||||
uint8_t dev[RMNET_MAX_STR_LEN];
|
||||
uint32_t flags;
|
||||
uint16_t agg_size;
|
||||
uint16_t agg_count;
|
||||
uint8_t tail_spacing;
|
||||
} data_format;
|
||||
struct {
|
||||
uint8_t dev[RMNET_MAX_STR_LEN];
|
||||
int32_t ep_id;
|
||||
uint8_t operating_mode;
|
||||
uint8_t next_dev[RMNET_MAX_STR_LEN];
|
||||
} local_ep_config;
|
||||
struct {
|
||||
uint32_t id;
|
||||
uint8_t vnd_name[RMNET_MAX_STR_LEN];
|
||||
} vnd;
|
||||
struct {
|
||||
uint32_t id;
|
||||
uint32_t map_flow_id;
|
||||
uint32_t tc_flow_id;
|
||||
} flow_control;
|
||||
};
|
||||
};
|
||||
|
||||
enum rmnet_netlink_message_types_e {
|
||||
/*
|
||||
* RMNET_NETLINK_ASSOCIATE_NETWORK_DEVICE - Register RMNET data driver
|
||||
* on a particular device.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_ASSOCIATE_NETWORK_DEVICE,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_UNASSOCIATE_NETWORK_DEVICE - Unregister RMNET data
|
||||
* driver on a particular
|
||||
* device.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_UNASSOCIATE_NETWORK_DEVICE,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_GET_NETWORK_DEVICE_ASSOCIATED - Get if RMNET data
|
||||
* driver is registered on a
|
||||
* particular device.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* Returns: 1 if registered, 0 if not
|
||||
*/
|
||||
RMNET_NETLINK_GET_NETWORK_DEVICE_ASSOCIATED,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_SET_LINK_EGRESS_DATA_FORMAT - Sets the egress data
|
||||
* format for a particular
|
||||
* link.
|
||||
* Args: uint32_t egress_flags
|
||||
* char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_SET_LINK_EGRESS_DATA_FORMAT,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_GET_LINK_EGRESS_DATA_FORMAT - Gets the egress data
|
||||
* format for a particular
|
||||
* link.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* Returns: 4-bytes data: uint32_t egress_flags
|
||||
*/
|
||||
RMNET_NETLINK_GET_LINK_EGRESS_DATA_FORMAT,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_SET_LINK_INGRESS_DATA_FORMAT - Sets the ingress data
|
||||
* format for a particular
|
||||
* link.
|
||||
* Args: uint32_t ingress_flags
|
||||
* char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_SET_LINK_INGRESS_DATA_FORMAT,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_GET_LINK_INGRESS_DATA_FORMAT - Gets the ingress data
|
||||
* format for a particular
|
||||
* link.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* Returns: 4-bytes data: uint32_t ingress_flags
|
||||
*/
|
||||
RMNET_NETLINK_GET_LINK_INGRESS_DATA_FORMAT,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_SET_LOGICAL_EP_CONFIG - Sets the logical endpoint
|
||||
* configuration for a particular
|
||||
* link.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* int32_t logical_ep_id, valid values are -1 through 31
|
||||
* uint8_t rmnet_mode: one of none, vnd, bridged
|
||||
* char[] egress_dev_name: Egress device if operating in bridge mode
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_SET_LOGICAL_EP_CONFIG,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_UNSET_LOGICAL_EP_CONFIG - Un-sets the logical endpoint
|
||||
* configuration for a particular
|
||||
* link.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* int32_t logical_ep_id, valid values are -1 through 31
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_UNSET_LOGICAL_EP_CONFIG,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_GET_LOGICAL_EP_CONFIG - Gets the logical endpoint
|
||||
* configuration for a particular
|
||||
* link.
|
||||
* Args: char[] dev_name: Null terminated ASCII string, max length: 15
|
||||
* int32_t logical_ep_id, valid values are -1 through 31
|
||||
* Returns: uint8_t rmnet_mode: one of none, vnd, bridged
|
||||
* char[] egress_dev_name: Egress device
|
||||
*/
|
||||
RMNET_NETLINK_GET_LOGICAL_EP_CONFIG,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_NEW_VND - Creates a new virtual network device node
|
||||
* Args: int32_t node number
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_NEW_VND,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_NEW_VND_WITH_PREFIX - Creates a new virtual network
|
||||
* device node with the specified
|
||||
* prefix for the device name
|
||||
* Args: int32_t node number
|
||||
* char[] vnd_name - Use as prefix
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_NEW_VND_WITH_PREFIX,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_GET_VND_NAME - Gets the string name of a VND from ID
|
||||
* Args: int32_t node number
|
||||
* Returns: char[] vnd_name
|
||||
*/
|
||||
RMNET_NETLINK_GET_VND_NAME,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_FREE_VND - Removes virtual network device node
|
||||
* Args: int32_t node number
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_FREE_VND,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_ADD_VND_TC_FLOW - Add flow control handle on VND
|
||||
* Args: int32_t node number
|
||||
* uint32_t MAP Flow Handle
|
||||
* uint32_t TC Flow Handle
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_ADD_VND_TC_FLOW,
|
||||
|
||||
/*
|
||||
* RMNET_NETLINK_DEL_VND_TC_FLOW - Removes flow control handle on VND
|
||||
* Args: int32_t node number
|
||||
* uint32_t MAP Flow Handle
|
||||
* Returns: status code
|
||||
*/
|
||||
RMNET_NETLINK_DEL_VND_TC_FLOW
|
||||
};
|
||||
|
||||
enum rmnet_config_endpoint_modes_e {
|
||||
/* Pass the frame up the stack with no modifications to skb->dev */
|
||||
RMNET_EPMODE_NONE,
|
||||
/* Replace skb->dev to a virtual rmnet device and pass up the stack */
|
||||
RMNET_EPMODE_VND,
|
||||
/* Pass the frame directly to another device with dev_queue_xmit(). */
|
||||
RMNET_EPMODE_BRIDGE,
|
||||
/* Must be the last item in the list */
|
||||
RMNET_EPMODE_LENGTH
|
||||
};
|
||||
|
||||
enum rmnet_config_return_codes_e {
|
||||
RMNET_CONFIG_OK,
|
||||
RMNET_CONFIG_UNKNOWN_MESSAGE,
|
||||
RMNET_CONFIG_UNKNOWN_ERROR,
|
||||
RMNET_CONFIG_NOMEM,
|
||||
RMNET_CONFIG_DEVICE_IN_USE,
|
||||
RMNET_CONFIG_INVALID_REQUEST,
|
||||
RMNET_CONFIG_NO_SUCH_DEVICE,
|
||||
RMNET_CONFIG_BAD_ARGUMENTS,
|
||||
RMNET_CONFIG_BAD_EGRESS_DEVICE,
|
||||
RMNET_CONFIG_TC_HANDLE_FULL
|
||||
};
|
||||
|
||||
#endif /* _RMNET_DATA_H_ */
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
#ifndef _SOCKEV_H_
|
||||
#define _SOCKEV_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/netlink.h>
|
||||
#include <linux/socket.h>
|
||||
|
||||
enum sknetlink_groups {
|
||||
SKNLGRP_UNICAST,
|
||||
SKNLGRP_SOCKEV,
|
||||
__SKNLGRP_MAX
|
||||
};
|
||||
|
||||
#define SOCKEV_STR_MAX 32
|
||||
|
||||
/********************************************************************
|
||||
* Socket operation messages
|
||||
****/
|
||||
|
||||
struct sknlsockevmsg {
|
||||
__u8 event[SOCKEV_STR_MAX];
|
||||
__u32 pid; /* (struct task_struct*)->pid */
|
||||
__u16 skfamily; /* (struct socket*)->sk->sk_family */
|
||||
__u8 skstate; /* (struct socket*)->sk->sk_state */
|
||||
__u8 skprotocol; /* (struct socket*)->sk->sk_protocol */
|
||||
__u16 sktype; /* (struct socket*)->sk->sk_type */
|
||||
__u64 skflags; /* (struct socket*)->sk->sk_flags */
|
||||
};
|
||||
|
||||
#endif /* _SOCKEV_H_ */
|
||||
|
||||
|
|
@ -0,0 +1,149 @@
|
|||
/*
|
||||
* INET An implementation of the TCP/IP protocol suite for the LINUX
|
||||
* operating system. INET is implemented using the BSD Socket
|
||||
* interface as the means of communication with the user level.
|
||||
*
|
||||
* Definitions of the socket-level I/O control calls.
|
||||
*
|
||||
* Version: @(#)sockios.h 1.0.2 03/09/93
|
||||
*
|
||||
* Authors: Ross Biro
|
||||
* Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
#ifndef _LINUX_SOCKIOS_H
|
||||
#define _LINUX_SOCKIOS_H
|
||||
|
||||
#include <asm/sockios.h>
|
||||
|
||||
/* Linux-specific socket ioctls */
|
||||
#define SIOCINQ FIONREAD
|
||||
#define SIOCOUTQ TIOCOUTQ /* output queue size (not sent + not acked) */
|
||||
|
||||
/* Routing table calls. */
|
||||
#define SIOCADDRT 0x890B /* add routing table entry */
|
||||
#define SIOCDELRT 0x890C /* delete routing table entry */
|
||||
#define SIOCRTMSG 0x890D /* call to routing system */
|
||||
|
||||
/* Socket configuration controls. */
|
||||
#define SIOCGIFNAME 0x8910 /* get iface name */
|
||||
#define SIOCSIFLINK 0x8911 /* set iface channel */
|
||||
#define SIOCGIFCONF 0x8912 /* get iface list */
|
||||
#define SIOCGIFFLAGS 0x8913 /* get flags */
|
||||
#define SIOCSIFFLAGS 0x8914 /* set flags */
|
||||
#define SIOCGIFADDR 0x8915 /* get PA address */
|
||||
#define SIOCSIFADDR 0x8916 /* set PA address */
|
||||
#define SIOCGIFDSTADDR 0x8917 /* get remote PA address */
|
||||
#define SIOCSIFDSTADDR 0x8918 /* set remote PA address */
|
||||
#define SIOCGIFBRDADDR 0x8919 /* get broadcast PA address */
|
||||
#define SIOCSIFBRDADDR 0x891a /* set broadcast PA address */
|
||||
#define SIOCGIFNETMASK 0x891b /* get network PA mask */
|
||||
#define SIOCSIFNETMASK 0x891c /* set network PA mask */
|
||||
#define SIOCGIFMETRIC 0x891d /* get metric */
|
||||
#define SIOCSIFMETRIC 0x891e /* set metric */
|
||||
#define SIOCGIFMEM 0x891f /* get memory address (BSD) */
|
||||
#define SIOCSIFMEM 0x8920 /* set memory address (BSD) */
|
||||
#define SIOCGIFMTU 0x8921 /* get MTU size */
|
||||
#define SIOCSIFMTU 0x8922 /* set MTU size */
|
||||
#define SIOCSIFNAME 0x8923 /* set interface name */
|
||||
#define SIOCSIFHWADDR 0x8924 /* set hardware address */
|
||||
#define SIOCGIFENCAP 0x8925 /* get/set encapsulations */
|
||||
#define SIOCSIFENCAP 0x8926
|
||||
#define SIOCGIFHWADDR 0x8927 /* Get hardware address */
|
||||
#define SIOCGIFSLAVE 0x8929 /* Driver slaving support */
|
||||
#define SIOCSIFSLAVE 0x8930
|
||||
#define SIOCADDMULTI 0x8931 /* Multicast address lists */
|
||||
#define SIOCDELMULTI 0x8932
|
||||
#define SIOCGIFINDEX 0x8933 /* name -> if_index mapping */
|
||||
#define SIOGIFINDEX SIOCGIFINDEX /* misprint compatibility :-) */
|
||||
#define SIOCSIFPFLAGS 0x8934 /* set/get extended flags set */
|
||||
#define SIOCGIFPFLAGS 0x8935
|
||||
#define SIOCDIFADDR 0x8936 /* delete PA address */
|
||||
#define SIOCSIFHWBROADCAST 0x8937 /* set hardware broadcast addr */
|
||||
#define SIOCGIFCOUNT 0x8938 /* get number of devices */
|
||||
#define SIOCKILLADDR 0x8939 /* kill sockets with this local addr */
|
||||
|
||||
#define SIOCGIFBR 0x8940 /* Bridging support */
|
||||
#define SIOCSIFBR 0x8941 /* Set bridging options */
|
||||
|
||||
#define SIOCGIFTXQLEN 0x8942 /* Get the tx queue length */
|
||||
#define SIOCSIFTXQLEN 0x8943 /* Set the tx queue length */
|
||||
|
||||
/* SIOCGIFDIVERT was: 0x8944 Frame diversion support */
|
||||
/* SIOCSIFDIVERT was: 0x8945 Set frame diversion options */
|
||||
|
||||
#define SIOCETHTOOL 0x8946 /* Ethtool interface */
|
||||
|
||||
#define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */
|
||||
#define SIOCGMIIREG 0x8948 /* Read MII PHY register. */
|
||||
#define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
|
||||
|
||||
#define SIOCWANDEV 0x894A /* get/set netdev parameters */
|
||||
|
||||
#define SIOCOUTQNSD 0x894B /* output queue size (not sent only) */
|
||||
|
||||
/* ARP cache control calls. */
|
||||
/* 0x8950 - 0x8952 * obsolete calls, don't re-use */
|
||||
#define SIOCDARP 0x8953 /* delete ARP table entry */
|
||||
#define SIOCGARP 0x8954 /* get ARP table entry */
|
||||
#define SIOCSARP 0x8955 /* set ARP table entry */
|
||||
|
||||
/* RARP cache control calls. */
|
||||
#define SIOCDRARP 0x8960 /* delete RARP table entry */
|
||||
#define SIOCGRARP 0x8961 /* get RARP table entry */
|
||||
#define SIOCSRARP 0x8962 /* set RARP table entry */
|
||||
|
||||
/* Driver configuration calls */
|
||||
|
||||
#define SIOCGIFMAP 0x8970 /* Get device parameters */
|
||||
#define SIOCSIFMAP 0x8971 /* Set device parameters */
|
||||
|
||||
/* DLCI configuration calls */
|
||||
|
||||
#define SIOCADDDLCI 0x8980 /* Create new DLCI device */
|
||||
#define SIOCDELDLCI 0x8981 /* Delete DLCI device */
|
||||
|
||||
#define SIOCGIFVLAN 0x8982 /* 802.1Q VLAN support */
|
||||
#define SIOCSIFVLAN 0x8983 /* Set 802.1Q VLAN options */
|
||||
|
||||
/* bonding calls */
|
||||
|
||||
#define SIOCBONDENSLAVE 0x8990 /* enslave a device to the bond */
|
||||
#define SIOCBONDRELEASE 0x8991 /* release a slave from the bond*/
|
||||
#define SIOCBONDSETHWADDR 0x8992 /* set the hw addr of the bond */
|
||||
#define SIOCBONDSLAVEINFOQUERY 0x8993 /* rtn info about slave state */
|
||||
#define SIOCBONDINFOQUERY 0x8994 /* rtn info about bond state */
|
||||
#define SIOCBONDCHANGEACTIVE 0x8995 /* update to a new active slave */
|
||||
|
||||
/* bridge calls */
|
||||
#define SIOCBRADDBR 0x89a0 /* create new bridge device */
|
||||
#define SIOCBRDELBR 0x89a1 /* remove bridge device */
|
||||
#define SIOCBRADDIF 0x89a2 /* add interface to bridge */
|
||||
#define SIOCBRDELIF 0x89a3 /* remove interface from bridge */
|
||||
|
||||
/* hardware time stamping: parameters in linux/net_tstamp.h */
|
||||
#define SIOCSHWTSTAMP 0x89b0
|
||||
|
||||
/* Device private ioctl calls */
|
||||
|
||||
/*
|
||||
* These 16 ioctls are available to devices via the do_ioctl() device
|
||||
* vector. Each device should include this file and redefine these names
|
||||
* as their own. Because these are device dependent it is a good idea
|
||||
* _NOT_ to issue them to random objects and hope.
|
||||
*
|
||||
* THESE IOCTLS ARE _DEPRECATED_ AND WILL DISAPPEAR IN 2.5.X -DaveM
|
||||
*/
|
||||
|
||||
#define SIOCDEVPRIVATE 0x89F0 /* to 89FF */
|
||||
|
||||
/*
|
||||
* These 16 ioctl calls are protocol private
|
||||
*/
|
||||
|
||||
#define SIOCPROTOPRIVATE 0x89E0 /* to 89EF */
|
||||
#endif /* _LINUX_SOCKIOS_H */
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
#ifndef _UAPI_LSM_PARAMS_H__
|
||||
#define _UAPI_LSM_PARAMS_H__
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <sound/asound.h>
|
||||
|
||||
#define SNDRV_LSM_VERSION SNDRV_PROTOCOL_VERSION(0, 1, 0)
|
||||
|
||||
enum lsm_app_id {
|
||||
LSM_VOICE_WAKEUP_APP_ID = 1,
|
||||
LSM_VOICE_WAKEUP_APP_ID_V2 = 2,
|
||||
};
|
||||
|
||||
enum lsm_detection_mode {
|
||||
LSM_MODE_KEYWORD_ONLY_DETECTION = 1,
|
||||
LSM_MODE_USER_KEYWORD_DETECTION
|
||||
};
|
||||
|
||||
enum lsm_vw_status {
|
||||
LSM_VOICE_WAKEUP_STATUS_RUNNING = 1,
|
||||
LSM_VOICE_WAKEUP_STATUS_DETECTED,
|
||||
LSM_VOICE_WAKEUP_STATUS_END_SPEECH,
|
||||
LSM_VOICE_WAKEUP_STATUS_REJECTED
|
||||
};
|
||||
|
||||
struct snd_lsm_sound_model {
|
||||
__u8 __user *data;
|
||||
__u32 data_size;
|
||||
enum lsm_detection_mode detection_mode;
|
||||
__u16 min_keyw_confidence;
|
||||
__u16 min_user_confidence;
|
||||
bool detect_failure;
|
||||
};
|
||||
|
||||
struct snd_lsm_sound_model_v2 {
|
||||
__u8 __user *data;
|
||||
__u8 *confidence_level;
|
||||
__u32 data_size;
|
||||
enum lsm_detection_mode detection_mode;
|
||||
__u8 num_confidence_levels;
|
||||
bool detect_failure;
|
||||
};
|
||||
|
||||
struct snd_lsm_session_data {
|
||||
enum lsm_app_id app_id;
|
||||
};
|
||||
|
||||
struct snd_lsm_event_status {
|
||||
__u16 status;
|
||||
__u16 payload_size;
|
||||
__u8 payload[0];
|
||||
};
|
||||
|
||||
struct snd_lsm_detection_params {
|
||||
__u8 *conf_level;
|
||||
enum lsm_detection_mode detect_mode;
|
||||
__u8 num_confidence_levels;
|
||||
bool detect_failure;
|
||||
};
|
||||
|
||||
#define SNDRV_LSM_REG_SND_MODEL _IOW('U', 0x00, struct snd_lsm_sound_model)
|
||||
#define SNDRV_LSM_DEREG_SND_MODEL _IOW('U', 0x01, int)
|
||||
#define SNDRV_LSM_EVENT_STATUS _IOW('U', 0x02, struct snd_lsm_event_status)
|
||||
#define SNDRV_LSM_ABORT_EVENT _IOW('U', 0x03, int)
|
||||
#define SNDRV_LSM_START _IOW('U', 0x04, int)
|
||||
#define SNDRV_LSM_STOP _IOW('U', 0x05, int)
|
||||
#define SNDRV_LSM_SET_SESSION_DATA _IOW('U', 0x06, struct snd_lsm_session_data)
|
||||
#define SNDRV_LSM_REG_SND_MODEL_V2 _IOW('U', 0x07,\
|
||||
struct snd_lsm_sound_model_v2)
|
||||
#define SNDRV_LSM_LAB_CONTROL _IOW('U', 0x08, uint32_t)
|
||||
#define SNDRV_LSM_STOP_LAB _IO('U', 0x09)
|
||||
#define SNDRV_LSM_SET_PARAMS _IOW('U', 0x0A, \
|
||||
struct snd_lsm_detection_params)
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,71 @@
|
|||
/*
|
||||
* include/linux/v4l2-common.h
|
||||
*
|
||||
* Common V4L2 and V4L2 subdev definitions.
|
||||
*
|
||||
* Users are advised to #include this file either through videodev2.h
|
||||
* (V4L2) or through v4l2-subdev.h (V4L2 subdev) rather than to refer
|
||||
* to this file directly.
|
||||
*
|
||||
* Copyright (C) 2012 Nokia Corporation
|
||||
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
||||
* 02110-1301 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __V4L2_COMMON__
|
||||
#define __V4L2_COMMON__
|
||||
|
||||
/*
|
||||
*
|
||||
* Selection interface definitions
|
||||
*
|
||||
*/
|
||||
|
||||
/* Current cropping area */
|
||||
#define V4L2_SEL_TGT_CROP 0x0000
|
||||
/* Default cropping area */
|
||||
#define V4L2_SEL_TGT_CROP_DEFAULT 0x0001
|
||||
/* Cropping bounds */
|
||||
#define V4L2_SEL_TGT_CROP_BOUNDS 0x0002
|
||||
/* Current composing area */
|
||||
#define V4L2_SEL_TGT_COMPOSE 0x0100
|
||||
/* Default composing area */
|
||||
#define V4L2_SEL_TGT_COMPOSE_DEFAULT 0x0101
|
||||
/* Composing bounds */
|
||||
#define V4L2_SEL_TGT_COMPOSE_BOUNDS 0x0102
|
||||
/* Current composing area plus all padding pixels */
|
||||
#define V4L2_SEL_TGT_COMPOSE_PADDED 0x0103
|
||||
|
||||
/* Backward compatibility target definitions --- to be removed. */
|
||||
#define V4L2_SEL_TGT_CROP_ACTIVE V4L2_SEL_TGT_CROP
|
||||
#define V4L2_SEL_TGT_COMPOSE_ACTIVE V4L2_SEL_TGT_COMPOSE
|
||||
#define V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL V4L2_SEL_TGT_CROP
|
||||
#define V4L2_SUBDEV_SEL_TGT_COMPOSE_ACTUAL V4L2_SEL_TGT_COMPOSE
|
||||
#define V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS V4L2_SEL_TGT_CROP_BOUNDS
|
||||
#define V4L2_SUBDEV_SEL_TGT_COMPOSE_BOUNDS V4L2_SEL_TGT_COMPOSE_BOUNDS
|
||||
|
||||
/* Selection flags */
|
||||
#define V4L2_SEL_FLAG_GE (1 << 0)
|
||||
#define V4L2_SEL_FLAG_LE (1 << 1)
|
||||
#define V4L2_SEL_FLAG_KEEP_CONFIG (1 << 2)
|
||||
|
||||
/* Backward compatibility flag definitions --- to be removed. */
|
||||
#define V4L2_SUBDEV_SEL_FLAG_SIZE_GE V4L2_SEL_FLAG_GE
|
||||
#define V4L2_SUBDEV_SEL_FLAG_SIZE_LE V4L2_SEL_FLAG_LE
|
||||
#define V4L2_SUBDEV_SEL_FLAG_KEEP_CONFIG V4L2_SEL_FLAG_KEEP_CONFIG
|
||||
|
||||
#endif /* __V4L2_COMMON__ */
|
||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
Loading…
Add table
Add a link
Reference in a new issue