upload android base code part8
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android/toolchain/binutils/binutils-2.25/gas/config/tc-ip2k.c
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android/toolchain/binutils/binutils-2.25/gas/config/tc-ip2k.c
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/* tc-ip2k.c -- Assembler for the Scenix IP2xxx.
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Copyright (C) 2000-2014 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "as.h"
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#include "subsegs.h"
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#include "symcat.h"
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#include "opcodes/ip2k-desc.h"
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#include "opcodes/ip2k-opc.h"
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#include "cgen.h"
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#include "elf/common.h"
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#include "elf/ip2k.h"
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#include "libbfd.h"
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/* Structure to hold all of the different components describing
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an individual instruction. */
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typedef struct
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{
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const CGEN_INSN * insn;
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const CGEN_INSN * orig_insn;
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CGEN_FIELDS fields;
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#if CGEN_INT_INSN_P
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CGEN_INSN_INT buffer [1];
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#define INSN_VALUE(buf) (*(buf))
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#else
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unsigned char buffer [CGEN_MAX_INSN_SIZE];
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#define INSN_VALUE(buf) (buf)
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#endif
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char * addr;
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fragS * frag;
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int num_fixups;
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fixS * fixups [GAS_CGEN_MAX_FIXUPS];
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int indices [MAX_OPERAND_INSTANCES];
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}
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ip2k_insn;
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const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "";
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
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/* Flag to detect when switching to code section where insn alignment is
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implied. */
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static int force_code_align = 0;
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/* Mach selected from command line. */
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static int ip2k_mach = 0;
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static unsigned ip2k_mach_bitmask = 0;
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static void
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ip2k_elf_section_rtn (int i)
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{
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obj_elf_section(i);
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if (force_code_align)
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{
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/* The s_align_ptwo function expects that we are just after a .align
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directive and it will either try and read the align value or stop
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if end of line so we must fake it out so it thinks we are at the
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end of the line. */
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char *old_input_line_pointer = input_line_pointer;
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input_line_pointer = "\n";
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s_align_ptwo (1);
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force_code_align = 0;
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/* Restore. */
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input_line_pointer = old_input_line_pointer;
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}
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}
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static void
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ip2k_elf_section_text (int i)
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{
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char *old_input_line_pointer;
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obj_elf_text(i);
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/* the s_align_ptwo function expects that we are just after a .align
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directive and it will either try and read the align value or stop if
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end of line so we must fake it out so it thinks we are at the end of
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the line. */
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old_input_line_pointer = input_line_pointer;
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input_line_pointer = "\n";
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s_align_ptwo (1);
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force_code_align = 0;
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/* Restore. */
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input_line_pointer = old_input_line_pointer;
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}
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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{ "text", ip2k_elf_section_text, 0 },
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{ "sect", ip2k_elf_section_rtn, 0 },
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{ NULL, NULL, 0 }
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};
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enum options
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{
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OPTION_CPU_IP2022 = OPTION_MD_BASE,
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OPTION_CPU_IP2022EXT
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};
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struct option md_longopts[] =
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{
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{ "mip2022", no_argument, NULL, OPTION_CPU_IP2022 },
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{ "mip2022ext", no_argument, NULL, OPTION_CPU_IP2022EXT },
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{ NULL, no_argument, NULL, 0 },
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};
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size_t md_longopts_size = sizeof (md_longopts);
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const char * md_shortopts = "";
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int
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md_parse_option (int c ATTRIBUTE_UNUSED, char * arg ATTRIBUTE_UNUSED)
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{
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switch (c)
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{
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case OPTION_CPU_IP2022:
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ip2k_mach = bfd_mach_ip2022;
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ip2k_mach_bitmask = 1 << MACH_IP2022;
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break;
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case OPTION_CPU_IP2022EXT:
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ip2k_mach = bfd_mach_ip2022ext;
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ip2k_mach_bitmask = 1 << MACH_IP2022EXT;
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break;
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default:
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return 0;
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}
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return 1;
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}
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void
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md_show_usage (FILE * stream)
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{
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fprintf (stream, _("IP2K specific command line options:\n"));
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fprintf (stream, _(" -mip2022 restrict to IP2022 insns \n"));
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fprintf (stream, _(" -mip2022ext permit extended IP2022 insn\n"));
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}
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void
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md_begin (void)
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{
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/* Initialize the `cgen' interface. */
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/* Set the machine number and endian. */
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gas_cgen_cpu_desc = ip2k_cgen_cpu_open (CGEN_CPU_OPEN_MACHS,
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ip2k_mach_bitmask,
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CGEN_CPU_OPEN_ENDIAN,
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CGEN_ENDIAN_BIG,
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CGEN_CPU_OPEN_END);
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ip2k_cgen_init_asm (gas_cgen_cpu_desc);
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/* This is a callback from cgen to gas to parse operands. */
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cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
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/* Set the machine type. */
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bfd_default_set_arch_mach (stdoutput, bfd_arch_ip2k, ip2k_mach);
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}
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void
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md_assemble (char * str)
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{
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ip2k_insn insn;
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char * errmsg;
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/* Initialize GAS's cgen interface for a new instruction. */
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gas_cgen_init_parse ();
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insn.insn = ip2k_cgen_assemble_insn
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(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
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if (!insn.insn)
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{
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as_bad ("%s", errmsg);
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return;
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}
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/* Check for special relocation required by SKIP instructions. */
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if (CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_SKIPA))
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/* Unconditional skip has a 1-bit relocation of the current pc, so
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that we emit either sb pcl.0 or snb pcl.0 depending on whether
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the PCL (pc + 2) >> 1 is odd or even. */
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{
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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const char *curpc_plus_2 = ".+2";
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const char *err;
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err = cgen_parse_address (gas_cgen_cpu_desc, & curpc_plus_2,
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IP2K_OPERAND_ADDR16CJP,
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BFD_RELOC_IP2K_PC_SKIP,
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& result_type, & value);
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if (err)
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{
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as_bad ("%s", err);
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return;
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}
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}
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/* Doesn't really matter what we pass for RELAX_P here. */
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gas_cgen_finish_insn (insn.insn, insn.buffer,
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CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
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}
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valueT
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md_section_align (segT segment, valueT size)
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{
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int align = bfd_get_section_alignment (stdoutput, segment);
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return ((size + (1 << align) - 1) & (-1 << align));
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}
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symbolS *
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md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
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{
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return 0;
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}
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int
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md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED,
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segT segment ATTRIBUTE_UNUSED)
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{
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as_fatal (_("relaxation not supported\n"));
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return 1;
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}
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/* *fragP has been relaxed to its final size, and now needs to have
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the bytes inside it modified to conform to the new size.
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Called after relaxation is finished.
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fragP->fr_type == rs_machine_dependent.
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fragP->fr_subtype is the subtype of what the address relaxed to. */
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void
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md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
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segT sec ATTRIBUTE_UNUSED,
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fragS * fragP ATTRIBUTE_UNUSED)
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{
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}
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/* Functions concerning relocs. */
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long
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md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
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{
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abort ();
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}
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/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
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Returns BFD_RELOC_NONE if no reloc type can be found.
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*FIXP may be modified if desired. */
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bfd_reloc_code_real_type
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md_cgen_lookup_reloc (const CGEN_INSN * insn ATTRIBUTE_UNUSED,
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const CGEN_OPERAND * operand,
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fixS * fixP ATTRIBUTE_UNUSED)
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{
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bfd_reloc_code_real_type result;
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result = BFD_RELOC_NONE;
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switch (operand->type)
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{
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case IP2K_OPERAND_FR:
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case IP2K_OPERAND_ADDR16L:
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case IP2K_OPERAND_ADDR16H:
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case IP2K_OPERAND_LIT8:
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/* These may have been processed at parse time. */
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if (fixP->fx_cgen.opinfo != 0)
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result = fixP->fx_cgen.opinfo;
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fixP->fx_no_overflow = 1;
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break;
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case IP2K_OPERAND_ADDR16CJP:
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result = fixP->fx_cgen.opinfo;
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if (result == 0 || result == BFD_RELOC_NONE)
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result = BFD_RELOC_IP2K_ADDR16CJP;
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fixP->fx_no_overflow = 1;
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break;
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case IP2K_OPERAND_ADDR16P:
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result = BFD_RELOC_IP2K_PAGE3;
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fixP->fx_no_overflow = 1;
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break;
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default:
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result = BFD_RELOC_NONE;
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break;
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}
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return result;
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}
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/* Write a value out to the object file, using the appropriate endianness. */
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void
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md_number_to_chars (char * buf, valueT val, int n)
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{
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number_to_chars_bigendian (buf, val, n);
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}
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char *
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md_atof (int type, char * litP, int * sizeP)
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{
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return ieee_md_atof (type, litP, sizeP, TRUE);
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}
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/* See whether we need to force a relocation into the output file.
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Force most of them, since the linker's bfd relocation engine
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understands range limits better than gas' cgen fixup engine.
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Consider the case of a fixup intermediate value being larger than
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the instruction it will be eventually encoded within. */
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int
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ip2k_force_relocation (fixS * fix)
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{
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switch (fix->fx_r_type)
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{
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case BFD_RELOC_IP2K_FR9:
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case BFD_RELOC_IP2K_FR_OFFSET:
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case BFD_RELOC_IP2K_BANK:
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case BFD_RELOC_IP2K_ADDR16CJP:
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case BFD_RELOC_IP2K_PAGE3:
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case BFD_RELOC_IP2K_LO8DATA:
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case BFD_RELOC_IP2K_HI8DATA:
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case BFD_RELOC_IP2K_EX8DATA:
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case BFD_RELOC_IP2K_LO8INSN:
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case BFD_RELOC_IP2K_HI8INSN:
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case BFD_RELOC_IP2K_PC_SKIP:
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case BFD_RELOC_IP2K_TEXT:
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return 1;
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case BFD_RELOC_16:
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if (fix->fx_subsy && S_IS_DEFINED (fix->fx_subsy)
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&& fix->fx_addsy && S_IS_DEFINED (fix->fx_addsy)
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&& (S_GET_SEGMENT (fix->fx_addsy)->flags & SEC_CODE))
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{
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fix->fx_r_type = BFD_RELOC_IP2K_TEXT;
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return 0;
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}
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break;
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default:
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break;
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}
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return generic_force_reloc (fix);
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}
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void
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ip2k_apply_fix (fixS *fixP, valueT *valueP, segT seg)
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{
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if (fixP->fx_r_type == BFD_RELOC_IP2K_TEXT
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&& ! fixP->fx_addsy
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&& ! fixP->fx_subsy)
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{
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*valueP = ((int)(* valueP)) / 2;
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fixP->fx_r_type = BFD_RELOC_16;
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}
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else if (fixP->fx_r_type == BFD_RELOC_UNUSED + IP2K_OPERAND_FR)
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{
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/* Must be careful when we are fixing up an FR. We could be
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fixing up an offset to (SP) or (DP) in which case we don't
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want to step on the top 2 bits of the FR operand. The
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gas_cgen_md_apply_fix doesn't know any better and overwrites
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the entire operand. We counter this by adding the bits
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to the new value. */
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char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
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/* Canonical name, since used a lot. */
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CGEN_CPU_DESC cd = gas_cgen_cpu_desc;
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CGEN_INSN_INT insn_value
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= cgen_get_insn_value (cd, (unsigned char *) where,
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CGEN_INSN_BITSIZE (fixP->fx_cgen.insn));
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/* Preserve (DP) or (SP) specification. */
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*valueP += (insn_value & 0x180);
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}
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gas_cgen_md_apply_fix (fixP, valueP, seg);
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}
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int
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ip2k_elf_section_flags (flagword flags,
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bfd_vma attr ATTRIBUTE_UNUSED,
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int type ATTRIBUTE_UNUSED)
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{
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/* This is used to detect when the section changes to an executable section.
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This function is called by the elf section processing. When we note an
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executable section specifier we set an internal flag to denote when
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word alignment should be forced. */
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if (flags & SEC_CODE)
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force_code_align = 1;
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return flags;
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}
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